Searched refs:IMR1_CORE1_A53 (Results 1 – 9 of 9) sorted by relevance
19 #define IMR1_CORE1_A53 0x40 macro
19 #define IMR1_CORE1_A53 0x44 macro
150 mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0); in imx_gpc_init()
22 static uint32_t gpc_imr_offset[] = { IMR1_CORE0_A53, IMR1_CORE1_A53, IMR1_CORE2_A53, IMR1_CORE3_A53…
317 mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0); in imx_gpc_init()
300 mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0); in imx_gpc_init()
38 IMX_GPC_BASE + IMR1_CORE1_A53,