| #
117b3572 |
| 06-Sep-2023 |
Yann Gautier <yann.gautier@st.com> |
Merge "feat(imx8m): move the gpc reg & macro to a separate header file" into integration
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| #
2a6ffa99 |
| 23-Mar-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8m): move the gpc reg & macro to a separate header file
move the gpc reg offset, bit define & macro to a separate header
file for code reuse.
This fixes suspend to mem on i.MX8M Plus too, s
feat(imx8m): move the gpc reg & macro to a separate header file
move the gpc reg offset, bit define & macro to a separate header
file for code reuse.
This fixes suspend to mem on i.MX8M Plus too, since the register
layout is different there.
Change-Id: Ibec60c3a68ffa8c378de5334577a7b0e463ca875
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Upgrade to latest, update commit message
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| #
4bd8c929 |
| 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I1bfa797e,I0ec7a70e into integration
* changes:
fix(tree): correct some typos
fix(rockchip): use semicolon instead of comma
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| #
1b491eea |
| 13-Feb-2023 |
Elyes Haouas <ehaouas@noos.fr> |
fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6
fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
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| #
0cb8dd7a |
| 08-Jul-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes Iec22dcab,Ib88b4b5d,I50cd6b82,If1167785,I9b3a08ef, ... into integration
* changes:
feat(imx8m): keep pu domains in default state during boot stage
feat(imx8m): add the PU power dom
Merge changes Iec22dcab,Ib88b4b5d,I50cd6b82,If1167785,I9b3a08ef, ... into integration
* changes:
feat(imx8m): keep pu domains in default state during boot stage
feat(imx8m): add the PU power domain support on imx8mm/mn
feat(imx8m): add the anamix pll override setting
feat(imx8m): add the ddr frequency change support for imx8m family
feat(imx8mn): enable dram retention suuport on imx8mn
feat(imx8mm): enable dram retention suuport on imx8mm
feat(imx8m): add dram retention flow for imx8m family
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| #
9d3249de |
| 17-Jan-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8m): keep pu domains in default state during boot stage
No need to keep all PU domains on as the full power domain driver
support has been added.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
feat(imx8m): keep pu domains in default state during boot stage
No need to keep all PU domains on as the full power domain driver
support has been added.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Iec22dcabbbfe3f38b915104a437d396d7b1bb2d8
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| #
44dea544 |
| 11-Dec-2019 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8m): add the PU power domain support on imx8mm/mn
Add the PU power domain support for imx8mm/mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ib88b4b5db956fdf2c77d2f2f3723d61a7060
feat(imx8m): add the PU power domain support on imx8mm/mn
Add the PU power domain support for imx8mm/mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ib88b4b5db956fdf2c77d2f2f3723d61a7060409d
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| #
d7cf435b |
| 13-Mar-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1859 from JackyBai/master
refact the imx8m common code and add the imx8mm support
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| #
179f82a2 |
| 06-Mar-2019 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8m: Add the basic support for imx8mm
The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-a
plat: imx8m: Add the basic support for imx8mm
The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-art media-specific
features with high-performance processing while optimized
for lowest power consumption. The i.MX 8M Mini Media Applications
Processor is 14nm FinFET product of the growing i.MX8M family
targeting the consumer & industrial market. It is built in 14LPP
to achieve both high performance and low power consumption
and relies on a powerful fully coherent core complex based on
a quad Cortex-A53 cluster with video and graphics accelerators
this patch add the basic support for i.MX8MM.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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