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Searched refs:ID_AA64PFR1_EL1_SSBS_MASK (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/lib/cpus/aarch64/
H A Drainier.S36 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
H A Dneoverse_n1.S205 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
H A Dneoverse_n2.S259 tst x0, #(ID_AA64PFR1_EL1_SSBS_MASK << ID_AA64PFR1_EL1_SSBS_SHIFT)
H A Dcortex_a76.S468 and x0, x0, #ID_AA64PFR1_EL1_SSBS_MASK
/rk3399_ARM-atf/services/arm_arch_svc/
H A Darm_arch_svc_setup.c54 ID_AA64PFR1_EL1_SSBS_MASK; in smccc_arch_features()
/rk3399_ARM-atf/include/arch/aarch64/
H A Darch_features.h407 ID_AA64PFR1_EL1_SSBS_MASK, 1U, in CREATE_FEATURE_SUPPORTED()
H A Darch.h516 #define ID_AA64PFR1_EL1_SSBS_MASK ULL(0xf) macro