Home
last modified time | relevance | path

Searched refs:GPIO3_BASE (Results 1 – 21 of 21) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx93/
H A Dimx93_bl31_setup.c113 mmio_write_32(GPIO3_BASE + 0x10, 0xffffffff); in bl31_plat_arch_setup()
114 mmio_write_32(GPIO3_BASE + 0x14, 0x3); in bl31_plat_arch_setup()
115 mmio_write_32(GPIO3_BASE + 0x18, 0xffffffff); in bl31_plat_arch_setup()
116 mmio_write_32(GPIO3_BASE + 0x1c, 0x3); in bl31_plat_arch_setup()
/rk3399_ARM-atf/plat/imx/imx9/imx95/
H A Dimx95_bl31_setup.c18 GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE
H A Dimx95_psci.c55 GPIO_CTX(GPIO3_BASE, 32U),
/rk3399_ARM-atf/plat/imx/imx9/imx94/
H A Dimx94_bl31_setup.c18 GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE,
H A Dimx94_psci.c61 GPIO_CTX(GPIO3_BASE, 26U),
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dhi6220.h59 #define GPIO3_BASE 0xF8014000 macro
/rk3399_ARM-atf/plat/rockchip/rk3568/
H A Drk3568_def.h61 #define GPIO3_BASE 0xfe760000 macro
/rk3399_ARM-atf/plat/rockchip/rk3328/
H A Drk3328_def.h48 #define GPIO3_BASE 0xff240000 macro
/rk3399_ARM-atf/plat/imx/imx9/imx95/include/
H A Dplatform_def.h71 #define GPIO3_BASE U(0x43820000) macro
/rk3399_ARM-atf/plat/imx/imx93/include/
H A Dplatform_def.h63 #define GPIO3_BASE U(0x43820000) macro
/rk3399_ARM-atf/plat/imx/imx9/imx94/include/
H A Dplatform_def.h65 #define GPIO3_BASE U(0x43820000) macro
/rk3399_ARM-atf/plat/rockchip/px30/
H A Dpx30_def.h88 #define GPIO3_BASE 0xff270000 macro
/rk3399_ARM-atf/plat/rockchip/rk3399/include/shared/
H A Daddressmap_shared.h41 #define GPIO3_BASE (MMIO_BASE + 0x07788000) macro
/rk3399_ARM-atf/plat/rockchip/rk3588/
H A Drk3588_def.h132 #define GPIO3_BASE 0xfec40000 macro
/rk3399_ARM-atf/plat/rockchip/rk3576/
H A Drk3576_def.h130 #define GPIO3_BASE 0x2ae30000 macro
/rk3399_ARM-atf/plat/rockchip/rk3328/drivers/soc/
H A Dsoc.c38 MAP_REGION_FLAT(GPIO3_BASE, GPIO3_SIZE,
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl_common.c450 pl061_gpio_register(GPIO3_BASE, 3); in hikey960_gpio_init()
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_bl_common.c56 pl061_gpio_register(GPIO3_BASE, 3); in hikey_gpio_init()
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dhi3660.h246 #define GPIO3_BASE UL(0xE8A0E000) macro
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dpmu.c938 gpio_direction[1] = mmio_read_32(GPIO3_BASE + 0x04); in suspend_apio()
958 mmio_clrbits_32(GPIO3_BASE + 0x04, 0x00ffffff); in suspend_apio()
1025 mmio_clrbits_32(GPIO3_BASE + 0x04, 0xff000000); in suspend_apio()
1049 mmio_write_32(GPIO3_BASE + 0x04, gpio_direction[1]); in resume_apio()
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/gpio/
H A Drk3399_gpio.c102 .port_base = GPIO3_BASE,