| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | imx93_bl31_setup.c | 108 mmio_write_32(GPIO2_BASE + 0x10, 0xffffffff); in bl31_plat_arch_setup()
109 mmio_write_32(GPIO2_BASE + 0x14, 0x3); in bl31_plat_arch_setup()
110 mmio_write_32(GPIO2_BASE + 0x18, 0xffffffff); in bl31_plat_arch_setup()
111 mmio_write_32(GPIO2_BASE + 0x1c, 0x3); in bl31_plat_arch_setup()
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| /rk3399_ARM-atf/plat/rockchip/rk3328/drivers/pmu/ |
| H A D | pmu.c | 226 val = mmio_read_32(GPIO2_BASE + SWPORTA_DDR); in rockchip_soc_system_off()
228 mmio_write_32(GPIO2_BASE + SWPORTA_DDR, val); in rockchip_soc_system_off()
231 val = mmio_read_32(GPIO2_BASE); in rockchip_soc_system_off()
233 mmio_write_32(GPIO2_BASE, val); in rockchip_soc_system_off()
472 sram_data.pmic_sleep_gpio_save[1] = mmio_read_32(GPIO2_BASE + 4); in rk3328_pmic_suspend()
473 sram_data.pmic_sleep_gpio_save[0] = mmio_read_32(GPIO2_BASE); in rk3328_pmic_suspend()
475 mmio_write_32(GPIO2_BASE + 4, in rk3328_pmic_suspend()
477 mmio_write_32(GPIO2_BASE, in rk3328_pmic_suspend()
483 mmio_write_32(GPIO2_BASE, sram_data.pmic_sleep_gpio_save[0]); in rk3328_pmic_resume()
484 mmio_write_32(GPIO2_BASE + 4, sram_data.pmic_sleep_gpio_save[1]); in rk3328_pmic_resume()
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| /rk3399_ARM-atf/plat/imx/imx9/imx95/ |
| H A D | imx95_bl31_setup.c | 18 GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE
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| H A D | imx95_psci.c | 54 GPIO_CTX(GPIO2_BASE, 32U),
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| /rk3399_ARM-atf/plat/imx/imx9/imx94/ |
| H A D | imx94_bl31_setup.c | 18 GPIO2_BASE, GPIO3_BASE, GPIO4_BASE, GPIO5_BASE,
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| H A D | imx94_psci.c | 60 GPIO_CTX(GPIO2_BASE, 32U),
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| /rk3399_ARM-atf/plat/imx/imx9/imx95/include/ |
| H A D | platform_def.h | 70 #define GPIO2_BASE U(0x43810000) macro
117 #define GPIO2_MAP MAP_REGION_FLAT(GPIO2_BASE, 0x20000, MT_DEVICE | MT_RW)
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| /rk3399_ARM-atf/plat/imx/imx9/imx94/include/ |
| H A D | platform_def.h | 64 #define GPIO2_BASE U(0x43810000) macro
114 #define GPIO2_MAP MAP_REGION_FLAT(GPIO2_BASE, 0x20000, MT_DEVICE | MT_RW)
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| /rk3399_ARM-atf/plat/hisilicon/hikey/include/ |
| H A D | hi6220.h | 58 #define GPIO2_BASE 0xF8013000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3568/ |
| H A D | rk3568_def.h | 60 #define GPIO2_BASE 0xfe750000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3328/ |
| H A D | rk3328_def.h | 45 #define GPIO2_BASE 0xff230000 macro
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| /rk3399_ARM-atf/plat/imx/imx93/include/ |
| H A D | platform_def.h | 62 #define GPIO2_BASE U(0x43810000) macro
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| /rk3399_ARM-atf/plat/rockchip/px30/ |
| H A D | px30_def.h | 85 #define GPIO2_BASE 0xff260000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3399/include/shared/ |
| H A D | addressmap_shared.h | 40 #define GPIO2_BASE (MMIO_BASE + 0x07780000) macro
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| /rk3399_ARM-atf/plat/rockchip/rk3588/ |
| H A D | rk3588_def.h | 131 #define GPIO2_BASE 0xfec30000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3576/ |
| H A D | rk3576_def.h | 129 #define GPIO2_BASE 0x2ae20000 macro
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| /rk3399_ARM-atf/plat/rockchip/rk3328/drivers/soc/ |
| H A D | soc.c | 36 MAP_REGION_FLAT(GPIO2_BASE, GPIO2_SIZE,
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_bl_common.c | 449 pl061_gpio_register(GPIO2_BASE, 2); in hikey960_gpio_init()
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| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hikey_bl_common.c | 55 pl061_gpio_register(GPIO2_BASE, 2); in hikey_gpio_init()
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/include/ |
| H A D | hi3660.h | 245 #define GPIO2_BASE UL(0xE8A0D000) macro
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| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/ |
| H A D | pmu.c | 937 gpio_direction[0] = mmio_read_32(GPIO2_BASE + 0x04); in suspend_apio()
975 mmio_clrbits_32(GPIO2_BASE + 0x04, 0x00001fff); in suspend_apio()
992 mmio_clrbits_32(GPIO2_BASE + 0x04, 0x1fff0000); in suspend_apio()
1048 mmio_write_32(GPIO2_BASE + 0x04, gpio_direction[0]); in resume_apio()
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| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/gpio/ |
| H A D | rk3399_gpio.c | 95 .port_base = GPIO2_BASE,
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