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Searched refs:DMA1 (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_system_manager.h179 #define DMA1 0x00090009 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_system_manager.h180 #define DMA1 0x00090009 macro
/rk3399_ARM-atf/include/dt-bindings/clock/
H A Dstm32mp13-clks.h81 #define DMA1 53 macro
H A Dstm32mp15-clks.h84 #define DMA1 71 macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_system_manager.h180 #define DMA1 0x00090009 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_system_manager.h189 #define DMA1 0x00090009 macro
/rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/
H A Dncore_ccu.c628 mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_ID_AX_REG_0_DMA1), DMA1); in setup_smmu_stream_id()