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Searched refs:CTX_GPREGS_OFFSET (Results 1 – 14 of 14) sorted by relevance

/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dwa_cve_2017_5715_bpiall.S26 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
27 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
28 stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
29 stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6]
30 stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
31 stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10]
32 stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12]
33 stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14]
34 stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
35 stp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18]
[all …]
H A Dwa_cve_2022_23960_bhb.S26 str x2, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
38 ldr x2, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
H A Dwa_cve_2025_0647_cpprctx.S229 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
230 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
231 ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
232 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
H A Dneoverse_n1.S273 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
274 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
275 ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
276 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
H A Dwa_cve_2017_5715_mmu.S20 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
63 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
H A Dcortex_a76.S48 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
50 stp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
53 ldp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
70 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
294 ldp x29, x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
H A Ddenver.S35 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
56 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
/rk3399_ARM-atf/lib/el3_runtime/aarch64/
H A Dcontext.S359 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
360 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
361 stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
362 stp x6, x7, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X6]
363 stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
364 stp x10, x11, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X10]
365 stp x12, x13, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X12]
366 stp x14, x15, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X14]
367 stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
368 stp x18, x19, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X18]
[all …]
/rk3399_ARM-atf/bl31/aarch64/
H A Druntime_exceptions.S48 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
52 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
89 str x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
93 ldr x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
341 stp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
342 stp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
343 stp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
360 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
361 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
362 ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4]
[all …]
H A Dea_delegate.S49 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
80 ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
81 str xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
/rk3399_ARM-atf/include/lib/el3_runtime/aarch64/
H A Dcontext.h37 #define CTX_GPREGS_OFFSET U(0x0) macro
77 #define CTX_EL3STATE_OFFSET (CTX_GPREGS_OFFSET + CTX_GPREGS_END)
389 CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context_t, gpregs_ctx),
/rk3399_ARM-atf/include/arch/aarch64/
H A Del3_common_macros.S453 str x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
455 ldr x29, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X29]
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-8.rst49 ldp x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
50 ldp x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]
/rk3399_ARM-atf/bl1/aarch64/
H A Dbl1_exceptions.S85 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]