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Searched refs:CPC_MCUSYS_PWR_CTRL (Results 1 – 13 of 13) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/mcdi/
H A Dmt_cpu_pm_cpc.c96 mmio_write_32(CPC_MCUSYS_PWR_CTRL, 1U); in mtk_cpc_mcusys_off_en()
101 mmio_write_32(CPC_MCUSYS_PWR_CTRL, 0U); in mtk_cpc_mcusys_off_dis()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/mcdi/
H A Dmt_cpu_pm_cpc.c96 mmio_write_32(CPC_MCUSYS_PWR_CTRL, 1U); in mtk_cpc_mcusys_off_en()
101 mmio_write_32(CPC_MCUSYS_PWR_CTRL, 0U); in mtk_cpc_mcusys_off_dis()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/mcdi/
H A Dmt_cpu_pm_cpc.c96 mmio_write_32(CPC_MCUSYS_PWR_CTRL, 1U); in mtk_cpc_mcusys_off_en()
101 mmio_write_32(CPC_MCUSYS_PWR_CTRL, 0U); in mtk_cpc_mcusys_off_dis()
/rk3399_ARM-atf/plat/mediatek/include/drivers/mcusys/v2/
H A Dmcucfg.h21 #define CPC_MCUSYS_PWR_CTRL (MCUSYS_CPC_BASE + 0x104) macro
/rk3399_ARM-atf/plat/mediatek/include/drivers/mcusys/v3/
H A Dmcucfg.h21 #define CPC_MCUSYS_PWR_CTRL (MCUSYS_CPC_BASE + 0x104) macro
/rk3399_ARM-atf/plat/mediatek/include/drivers/mcusys/v4/
H A Dmcucfg.h21 #define CPC_MCUSYS_PWR_CTRL (MCUSYS_CPC_BASE + 0x104) macro
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/
H A Dmt_cpu_pm_cpc.c86 mmio_write_32(CPC_MCUSYS_PWR_CTRL, enable ? 1 : 0); in mtk_cpc_mcusys_off_enable()
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_cpu_pm_cpc.c162 mmio_setbits_32(CPC_MCUSYS_PWR_CTRL, CPC_MCUSYS_OFF_EN); in mtk_cpc_mcusys_off_en()
167 mmio_clrbits_32(CPC_MCUSYS_PWR_CTRL, CPC_MCUSYS_OFF_EN); in mtk_cpc_mcusys_off_dis()
/rk3399_ARM-atf/plat/mediatek/drivers/mcusys/v1/
H A Dmcucfg.h40 #define CPC_MCUSYS_PWR_CTRL (MCUCFG_BASE + 0xA804) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/include/
H A Dmcucfg.h87 #define CPC_MCUSYS_PWR_CTRL MCUCFG_REG(0xa804) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/include/
H A Dmcucfg.h87 #define CPC_MCUSYS_PWR_CTRL MCUCFG_REG(0xa804) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/include/
H A Dmcucfg.h87 #define CPC_MCUSYS_PWR_CTRL MCUCFG_REG(0xa804) macro
/rk3399_ARM-atf/plat/mediatek/include/drivers/mcusys/v1/
H A Dmcucfg.h85 #define CPC_MCUSYS_PWR_CTRL (MCUCFG_BASE + 0xa804) macro