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/rk3399_ARM-atf/plat/imx/imx8ulp/upower/
H A Dupmu.h24 } B; member
35 } B; member
45 } B; member
62 } B; member
77 } B; member
93 } B; member
109 } B; member
125 } B; member
136 } B; member
147 } B; member
[all …]
H A Dupower_soc_defs.h128 (args).B.domapply = (args).B.avdapply = 0U; \
131 (args).B.avdapply = 1U; \
135 (args).B.domapply = 1U; \
138 (args).B.avdapply = 1U; \
142 (args).B.domapply = 1U; \
145 (args).B.avdapply = 1U; \
150 (args).B.dommode = (uint32_t)((bias)->dommode); \
151 (args).B.avdmode = (uint32_t)((bias)->avdmode); \
153 (args).B.domrbbn = ((bias)->dombias.rbbn > sat) ? sat : \
155 (args).B.domrbbp = ((bias)->dombias.rbbp > sat) ? sat : \
[all …]
H A Dupower_api.c182 mu->FCR.B.F0 = 0U; in upwr_txrx_isr()
554 if (mu->FSR.B.F0 != 0U) { in upwr_init()
562 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init()
575 mu->FCR.B.F0 = 1U; /* flag urgency status */ in upwr_init()
584 while (mu->RSR.B.RF0 == 0U) { in upwr_init()
588 mu->FCR.B.F0 = 0U; in upwr_init()
595 if (mu->FSR.B.F0 != 0U) { in upwr_init()
604 if (mu->FSR.B.F0 != 0U) { in upwr_init()
612 if (mu->FSR.B.F0 != 0U) { in upwr_init()
H A Dupower_hal.c55 while (muptr->RSR.B.RF0 == 0) { in upower_wait_resp()
H A Dupower_defs.h322 upwr_pwm_dom_bias_args B; member
340 upwr_pwm_mem_bias_args B; member
/rk3399_ARM-atf/fdts/
H A Dstm32mp15-pinctrl.dtsi85 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
127 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
143 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
157 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
158 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
159 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
160 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
177 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
178 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
179 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
[all …]
H A Dstm32mp13-pinctrl.dtsi13 <STM32_PINMUX('B', 9, AF6)>; /* I2C4_SDA */
47 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
48 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
49 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
50 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
92 pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */
H A Dstm32mp151a-prtt1a.dts225 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
226 <STM32_PINMUX('B', 7, AF10)>, /* SDMMC2_D1 */
227 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
228 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
250 pinmux = <STM32_PINMUX('B', 9, AF8)>; /* UART4_TX */
256 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
H A Drdaspen-defs.dtsi31 /* 64B */ \
50 /* 64B */ \
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv3/fdts/
H A Drdv3_spmc_sp_manifest.dts53 CPU(B)
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_memory_controller.c27 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) argument
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_memory_controller.c26 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) argument
/rk3399_ARM-atf/plat/intel/soc/stratix10/soc/
H A Ds10_memory_controller.c30 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) argument
/rk3399_ARM-atf/docs/plat/
H A Dallwinner.rst107 |B| |S|///| |//...///| |////| |
118 |B| |S|///| |//| | |
/rk3399_ARM-atf/docs/plat/nxp/
H A Dnxp-ls-fuse-prov.rst134 01e80254: d4fec2fd 9e567f31 5c422818 fd5c7be8 ....1.V..(B\.{\.
189 01e80254: d4fec2fd 9e567f31 5c422818 fd5c7be8 ....1.V..(B\.{\.
/rk3399_ARM-atf/docs/components/
H A Dsecure-partition-manager-mm.rst180 The `SMC Calling Convention`_ (*Arm DEN 0028B*) describes SMCs as a conduit for
250 The `SMC Calling Convention`_ (*Arm DEN 0028B*) specification describes the SMC
267 The `SMC Calling Convention`_ (*Arm DEN 0028B*) specification describes the
300 Secure Service calls range (see `SMC Calling Convention`_ (*Arm DEN 0028B*)
359 - For two revisions, A and B, for which the major revision values are
360 identical, if the minor revision value of revision B is greater than the
362 work in a compatible way with revision B. However, it is possible for
363 revision B to have a higher function count than revision A.
465 calls" of the `SMC Calling Convention`_ (*Arm DEN 0028B*) specification. In
/rk3399_ARM-atf/docs/plat/qti/
H A Drb3gen2.rst71 Log Type: B - Since Boot(Power On Reset), D - Delta, S - Statistic
/rk3399_ARM-atf/docs/plat/marvell/armada/
H A Duart-booting.rst38 > WtpDownload_linux -P UART -C <port#> -E -B TIM_ATF.bin -I wtmi_h.bin -I boot-image_h.bin
/rk3399_ARM-atf/docs/design_documents/
H A Dmeasured_boot_dtpm_poc.rst34 the Raspberry Pi 3 Model B V1.2, but this PoC is compatible with other
286 NOTICE: rpi3: Detected: Raspberry Pi 3 Model B (1GB, Sony, UK) [0x00a02082]
408 RPI 3 Model B (0xa02082)
/rk3399_ARM-atf/docs/process/
H A Dcoding-style.rst281 case B:
/rk3399_ARM-atf/docs/
H A Dchange-log.md2477 …- disable A/B loader support by default ([1a57115](https://review.trustedfirmware.org/plugins/giti…
9061 …- add extra offset if booting B-side ([993d809](https://review.trustedfirmware.org/plugins/gitiles…