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Searched refs:reg_offset (Results 1 – 5 of 5) sorted by relevance

/optee_os/core/drivers/
H A Dstm32_bsec.c739 paddr_t reg_offset = 0; in bsec_dt_otp_nsec_access() local
745 if (fdt_reg_info(fdt, bsec_subnode, &reg_offset, &reg_size)) in bsec_dt_otp_nsec_access()
748 otp_id = reg_offset / sizeof(uint32_t); in bsec_dt_otp_nsec_access()
752 ROUNDUP_DIV(reg_offset + reg_size, in bsec_dt_otp_nsec_access()
762 sizeof(uint32_t)) - reg_offset; in bsec_dt_otp_nsec_access()
763 reg_offset = STM32MP1_UPPER_OTP_START * in bsec_dt_otp_nsec_access()
807 if ((reg_offset % sizeof(uint32_t)) || in bsec_dt_otp_nsec_access()
837 paddr_t reg_offset = 0; in save_dt_nvmem_layout() local
852 if (fdt_reg_info(fdt, node, &reg_offset, &reg_length)) { in save_dt_nvmem_layout()
857 layout_cell->otp_id = reg_offset / sizeof(uint32_t); in save_dt_nvmem_layout()
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H A Dstm32_gpio.c244 unsigned int reg_offset = 0; in stm32_gpio_get_level() local
257 reg_offset = GPIO_IDR_OFFSET; in stm32_gpio_get_level()
260 reg_offset = GPIO_ODR_OFFSET; in stm32_gpio_get_level()
266 if (io_read32(bank->base + reg_offset) & BIT(gpio_pin)) in stm32_gpio_get_level()
/optee_os/core/drivers/crypto/hisilicon/
H A Dhisi_qm.c118 uint32_t reg_offset; member
122 { .reg_name = "QM_ECC_1BIT_CNT ", .reg_offset = 0x104000 },
123 { .reg_name = "QM_ECC_MBIT_CNT ", .reg_offset = 0x104008 },
124 { .reg_name = "QM_DFX_MB_CNT ", .reg_offset = 0x104018 },
125 { .reg_name = "QM_DFX_DB_CNT ", .reg_offset = 0x104028 },
126 { .reg_name = "QM_DFX_SQE_CNT ", .reg_offset = 0x104038 },
127 { .reg_name = "QM_DFX_CQE_CNT ", .reg_offset = 0x104048 },
128 { .reg_name = "QM_DFX_SEND_SQE_TO_ACC_CNT", .reg_offset = 0x104050 },
129 { .reg_name = "QM_DFX_WB_SQE_FROM_ACC_CNT", .reg_offset = 0x104058 },
130 { .reg_name = "QM_DFX_ACC_FINISH_CNT ", .reg_offset = 0x104060 },
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/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c3491 vaddr_t reg_offset = pdata->rcc_base + RCC_SEMCR(i); in handle_available_semaphores() local
3506 res = stm32_rif_release_semaphore(reg_offset, in handle_available_semaphores()
3514 res = stm32_rif_acquire_semaphore(reg_offset, in handle_available_semaphores()
H A Dclk-stm32mp25.c3567 vaddr_t reg_offset = pdata->rcc_base + RCC_SEMCR(i); in handle_available_semaphores() local
3581 res = stm32_rif_release_semaphore(reg_offset, in handle_available_semaphores()
3588 res = stm32_rif_acquire_semaphore(reg_offset, in handle_available_semaphores()