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Searched refs:pll_cfg (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c142 enum pll_cfg { enum
176 struct stm32_pll_dt_cfg pll_cfg; member
1185 ret = clk_stm32_parse_pll_fdt(fdt, subnode, &opp_cfg->pll_cfg); in stm32_clk_parse_fdt_opp()
2137 pll_conf = &opp->pll_cfg; in clk_stm32_pll1_set_rate()
H A Dclk-stm32mp13.c78 struct stm32_pll_dt_cfg pll_cfg; member
1629 ret = clk_stm32_parse_pll_fdt(fdt, subnode, &opp_cfg->pll_cfg); in stm32_clk_parse_fdt_opp()
1850 pll_conf = &opp->pll_cfg; in clk_stm32_pll1_set_rate()
H A Dclk-stm32mp25.c86 enum pll_cfg { enum
121 struct stm32_pll_dt_cfg pll_cfg; member
1203 ret = clk_stm32_parse_pll_fdt(fdt, subnode, &opp_cfg->pll_cfg); in stm32_clk_parse_fdt_opp()
2130 pll_conf = &opp->pll_cfg; in clk_stm32_pll1_set_rate()