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Searched refs:clk_get_rate (Results 1 – 19 of 19) sorted by relevance

/optee_os/core/drivers/counter/
H A Dstm32_stgen.c122 unsigned long clock_src_rate = clk_get_rate(stgen_d.stgen_clock); in stm32_stgen_pm_resume()
224 previous_source_rate = clk_get_rate(stgen_d.stgen_clock); in stgen_probe()
240 stgen_rate = clk_get_rate(stgen_d.stgen_clock); in stgen_probe()
/optee_os/core/drivers/clk/sam/
H A Dat91_utmi.c48 parent_rate = clk_get_rate(clk_parent); in clk_utmi_enable()
156 parent_rate = clk_get_rate(clk_parent); in clk_utmi_sama7g5_prepare()
H A Dat91_peripheral.c42 parent_rate = clk_get_rate(parent); in clk_sam9x5_peripheral_autodiv()
H A Dclk-sam9x60-pll.c455 parent_rate = clk_get_rate(parent); in sam9x60_clk_register_frac_pll()
/optee_os/core/arch/arm/plat-sam/
H A Dfreq.c38 freq = clk_get_rate(clk); in get_freq_from_dt()
/optee_os/core/drivers/clk/
H A Dclk.c127 DMSG("Registered clock %s, freq %lu", clk->name, clk_get_rate(clk)); in clk_register()
205 unsigned long clk_get_rate(struct clk *clk) in clk_get_rate() function
218 parent_rate = clk_get_rate(clk->parent); in clk_set_rate_no_lock()
225 rate = clk_get_rate(clk->parent); in clk_set_rate_no_lock()
486 rate = clk_get_rate(clk); in print_clk()
/optee_os/core/lib/scmi-server/
H A Dscmi_clock_consumer.c78 *rates = clk_get_rate(clk->parent); in scmi_clk_get_rates_array()
98 *min = clk_get_rate(clk); in scmi_clk_get_rates_steps()
/optee_os/core/include/drivers/
H A Dclk.h141 unsigned long clk_get_rate(struct clk *clk);
/optee_os/core/drivers/
H A Dstm32_iwdg.c147 uint64_t reload = (uint64_t)to_sec * clk_get_rate(iwdg->clk_lsi); in iwdg_timeout_cnt()
286 unsigned long rate = clk_get_rate(iwdg->clk_lsi); in iwdg_wdt_init()
346 rate = clk_get_rate(iwdg->clk_lsi); in stm32_iwdg_handle_timeouts()
H A Dstm32_cpu_opp.c306 clk_cpu = clk_get_rate(cpu_opp.clock); in cpu_opp_pm()
416 clk_cpu = clk_get_rate(cpu_opp.clock); in stm32_cpu_opp_get_dt_subnode()
H A Datmel_tcb.c186 tcb_rate = clk_get_rate(clk); in atmel_tcb_probe()
H A Dstm32_rng.c270 clock_rate = clk_get_rate(dev->clock); in stm32_rng_clock_freq_restrain()
280 DMSG("RNG clk rate : %lu", clk_get_rate(dev->clock) >> clock_div); in stm32_rng_clock_freq_restrain()
H A Dstm32_rtc.c574 unsigned long rate = clk_get_rate(rtc_dev.rtc_ck); in stm32_rtc_init()
1078 if (clk_get_rate(rtc_dev.pclk) < (clk_get_rate(rtc_dev.rtc_ck) * 7)) in stm32_rtc_probe()
H A Dstm32_omm.c256 clk_rate_max = MAX(clk_get_rate(ospi_d->clock), clk_rate_max); in stm32_omm_configure()
H A Dstm32_fmc.c382 unsigned long hclk = clk_get_rate(fmc_d->fmc_clock); in configure_fmc()
H A Dstm32_i2c.c618 clock_src = clk_get_rate(hi2c->clock); in i2c_setup_timing()
/optee_os/core/drivers/scmi-msg/
H A Dclock_generic.c110 return clk_get_rate(clk->clk); in plat_scmi_clock_get_rate()
/optee_os/core/drivers/i2c/
H A Datmel_i2c.c222 unsigned long clk = clk_get_rate(i2c->clk); in atmel_i2c_init_clk()
/optee_os/core/arch/arm/plat-stm32mp1/
H A Dscmi_server.c555 *array = clk_get_rate(clock->clk); in plat_scmi_clock_rates_array()
570 return clk_get_rate(clock->clk); in plat_scmi_clock_get_rate()