History log of /optee_os/core/include/drivers/clk.h (Results 1 – 17 of 17)
Revision Date Author Comments
# 6226e120 04-Oct-2024 Pascal Paillet <p.paillet@foss.st.com>

drivers: clk: change tree trace level

Change clock trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --clocks.

Signed-off-by: Pascal Paillet <p.paillet@foss.st

drivers: clk: change tree trace level

Change clock trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --clocks.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# fa31123d 16-Jul-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: clk_get_rates_array() returns ordered rates

Explicitly state in clk_get_rates_array() inline description comment
that the output rates arrays is ordered by increasing frequency
values.

drivers: clk: clk_get_rates_array() returns ordered rates

Explicitly state in clk_get_rates_array() inline description comment
that the output rates arrays is ordered by increasing frequency
values. This change allows to better fit the sole consumer of this
API function that is the SCMI server implementation. SCMI specification
states that discrete clock rates list shall follow this order.

Update at91_cpu_opp clock driver to ensure it satisfy this constraint.
The SAM platforms that embed this driver (sama7g5) already satisfy this
constraints but only at its DTS level. This change ensures the driver
will always.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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# 9a3248fc 29-Feb-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: replace clock main spinlock with a mutex

Change clock framework lock from an interrupts masked spinning lock
to a mutex. This allows the clock framework to better handle slow
stabilizi

drivers: clk: replace clock main spinlock with a mutex

Change clock framework lock from an interrupts masked spinning lock
to a mutex. This allows the clock framework to better handle slow
stabilizing clocks as PLLs without masking the system interrupt
which can have side effects on the REE or even the TEE.

To support clock accesses during low power state transition sequences
while non-secure world is no operating, the lock is not taken when
the execution is not in the scope of a TEE thread.

This change is not expected to impact supported platforms that currently
only access clock operation from thread contexts or atomic PM sequences.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# f8c1dacb 22-Feb-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: make API function description more consistent

Change inline description comments of clock framework API functions,
macros and structures to be more consistent.

Reviewed-by: Gatien Che

drivers: clk: make API function description more consistent

Change inline description comments of clock framework API functions,
macros and structures to be more consistent.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 8baaac1c 26-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: pre-enable new parent on clock re-parent

Add new clock flag CLK_SET_PARENT_PRE_ENABLE for when an already
enabled clock is re-parented and the new parent clock must be enabled
before w

drivers: clk: pre-enable new parent on clock re-parent

Add new clock flag CLK_SET_PARENT_PRE_ENABLE for when an already
enabled clock is re-parented and the new parent clock must be enabled
before we switch of parents.

This is needed for some system clocks that cannot be disabled, for
example an interconnect AXI bus clock or a CPU clock.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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# 8fbc0056 26-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: get linear rates description

Implement clk_get_rates_steps() clock API function to get the supported
clock rates description as a triplet min/max/step. This function can be
used in the

drivers: clk: get linear rates description

Implement clk_get_rates_steps() clock API function to get the supported
clock rates description as a triplet min/max/step. This function can be
used in the scope of SCMI communication where a clock can report a
linear rate list without listing all supported clock is an array
which size could be quite big.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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# 20f97d98 26-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: enable clock on rate change

Add new clock flag CLK_SET_RATE_UNGATE for clocks that must be
enabled in order to change their rate.

Reviewed-by: Gatien Chevallier <gatien.chevallier@fos

drivers: clk: enable clock on rate change

Add new clock flag CLK_SET_RATE_UNGATE for clocks that must be
enabled in order to change their rate.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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# 0ba7ae74 26-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: change parent clock rate if needed

Add clock flag CLK_SET_RATE_PARENT for clocks for which rate change
request must be propagated to the parent clock.

Reviewed-by: Gatien Chevallier <

drivers: clk: change parent clock rate if needed

Add clock flag CLK_SET_RATE_PARENT for clocks for which rate change
request must be propagated to the parent clock.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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# 05771552 26-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: Get duty cycle from parent clock

Add CLK_DUTY_CYCLE_PARENT clock flag for clock which duty cycle
information needs to be retrieved for the clock parent.

Reviewed-by: Gatien Chevallier

drivers: clk: Get duty cycle from parent clock

Add CLK_DUTY_CYCLE_PARENT clock flag for clock which duty cycle
information needs to be retrieved for the clock parent.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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# 59db7f68 26-Jan-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: Add clock duty cycle

Implement reading a clock duty cycle with new clock API function
clk_get_duty_cycle() and clock operation handle ::clk_get_duty_cycle.
When a clock does not provid

drivers: clk: Add clock duty cycle

Implement reading a clock duty cycle with new clock API function
clk_get_duty_cycle() and clock operation handle ::clk_get_duty_cycle.
When a clock does not provide the operation, it is assumed that the clock
has a 50% duty cycle.

Clock duty cycle information is used for example for some analog-digital
conversion peripheral. This new API function is also expected to be used
by SCMI clock service introduced in the SCMI specification v3.2 [1]
this allow to expose duty cycle service to SCMI clients.

Link: https://developer.arm.com/documentation/den0056/e/ [1]
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# aac2c716 28-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: print clock tree with debug trace level

Change clk_print_tree() to print the clock tree with debug trace
level instead of info trace level.

Add a test on TRACE_LEVEL >= TRACE_DEBUG in

drivers: clk: print clock tree with debug trace level

Change clk_print_tree() to print the clock tree with debug trace
level instead of info trace level.

Add a test on TRACE_LEVEL >= TRACE_DEBUG in clk_print_tree()
to ensures no unless code is embedded when the trace level is too low.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# f7299836 23-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: clk_print_tree() stub for disabled CFG_DRIVERS_CLK

Add an stub implementation of clk_print_tree() when CFG_DRIVERS_CLK
is disabled. This allows generic code as the statistics PTA to no

drivers: clk: clk_print_tree() stub for disabled CFG_DRIVERS_CLK

Add an stub implementation of clk_print_tree() when CFG_DRIVERS_CLK
is disabled. This allows generic code as the statistics PTA to not
rely on #ifdef CFG_DRIVERS_CLK pragma.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 2b13eca6 24-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: change queue from STAILQ to SLIST

Replace registered clock list from a STAILQ queue to a SLIST queue
that is enough for our purpose.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro

drivers: clk: change queue from STAILQ to SLIST

Replace registered clock list from a STAILQ queue to a SLIST queue
that is enough for our purpose.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# cd04d138 17-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: print clock tree summary

Adds clk_print_summary() to print the clock tree current state on core
console using the info trace level. Clock framework spinlock is help
while clock tree is

drivers: clk: print clock tree summary

Adds clk_print_summary() to print the clock tree current state on core
console using the info trace level. Clock framework spinlock is help
while clock tree is printed.

The feature depends on CFG_DRIVERS_CLK_PRINT_TREE being enabled.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Co-developed-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 5df61a5d 05-Jul-2021 Clément Léger <clement.leger@bootlin.com>

drivers: clk: add support for clk_get_rates_array

In order to query rates from clients, add get_rates_array() which
returns a supported rate array.

Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>

drivers: clk: add support for clk_get_rates_array

In order to query rates from clients, add get_rates_array() which
returns a supported rate array.

Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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# 6c9ed842 19-Sep-2021 Etienne Carriere <etienne.carriere@linaro.org>

drivers: clk: implement clk_is_enabled()

Add clock API function clk_is_enabled(). It is not very useful at
runtime since clock state can change at any time. The API function
is useful during specifi

drivers: clk: implement clk_is_enabled()

Add clock API function clk_is_enabled(). It is not very useful at
runtime since clock state can change at any time. The API function
is useful during specific system sequences where OP-TEE core knows
is executes atomically (primary core boot, low power sequences).

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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# 2305544b 10-Jun-2021 Clément Léger <clement.leger@bootlin.com>

drivers: clk: add generic clock framework

In order to ease clock support in OP-TEE, add a generic clock framework
which allows to add clocks driver and handle clock hierarchy.
This clock framework p

drivers: clk: add generic clock framework

In order to ease clock support in OP-TEE, add a generic clock framework
which allows to add clocks driver and handle clock hierarchy.
This clock framework provides various functions to enable/disable clock
and to get their rate. Some basic behavior are supported such as gating
when parent or rate is set. This option is enabled using
CFG_DRIVERS_CLK which is disabled by default.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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