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/optee_os/lib/libutils/ext/include/
H A Dbitstring.h43 #define _bit_byte(bit) \ argument
44 ((bit) >> 3)
47 #define _bit_mask(bit) \ argument
48 (1 << ((bit)&0x7))
64 #define bit_test(name, bit) \ argument
65 ((name)[_bit_byte(bit)] & _bit_mask(bit))
68 #define bit_set(name, bit) \ argument
69 ((name)[_bit_byte(bit)] |= _bit_mask(bit))
72 #define bit_clear(name, bit) \ argument
73 ((name)[_bit_byte(bit)] &= ~_bit_mask(bit))
/optee_os/core/kernel/
H A Dnotif_default.c45 int bit = 0; in notif_alloc_async_value() local
63 bit_ffc(nvb->alloc_values, (int)NOTIF_ASYNC_VALUE_MAX + 1, &bit); in notif_alloc_async_value()
64 if (bit < 0) { in notif_alloc_async_value()
68 *val = bit; in notif_alloc_async_value()
69 bit_set(nvb->alloc_values, bit); in notif_alloc_async_value()
107 int bit = -1; in notif_get_value() local
118 bit_ffs(nvb->values, (int)NOTIF_ASYNC_VALUE_MAX + 1, &bit); in notif_get_value()
119 *value_valid = (bit >= 0); in notif_get_value()
123 res = bit; in notif_get_value()
125 bit_ffs(nvb->values, (int)NOTIF_ASYNC_VALUE_MAX + 1, &bit); in notif_get_value()
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/optee_os/core/arch/arm/plat-sam/
H A Dtz_matrix.h66 #define MATRIX_LANSECH(n, bit) ((bit) << n) argument
69 #define MATRIX_RDNSECH(n, bit) ((bit) << (n + 8)) argument
72 #define MATRIX_WRNSECH(n, bit) ((bit) << (n + 16)) argument
H A Dmatrix.c112 unsigned int bit = 0x01 << (peri_id % 32); in matrix_set_periph_world() local
120 spselr &= ~bit; in matrix_set_periph_world()
122 spselr |= bit; in matrix_set_periph_world()
/optee_os/lib/libutils/isoc/arch/arm/softfloat/source/
H A Df128M_roundToInt.c80 uint32_t wordA, bit, wordZ; in f128M_roundToInt() local
159 bit = (uint32_t) 1<<bitPos; in f128M_roundToInt()
161 wordZ = wordA + bit; in f128M_roundToInt()
163 bit <<= 1; in f128M_roundToInt()
164 extrasMask = bit - 1; in f128M_roundToInt()
169 if ( ! bit ) { in f128M_roundToInt()
177 wordZ &= ~bit; in f128M_roundToInt()
180 extrasMask = bit - 1; in f128M_roundToInt()
188 wordZ += bit; in f128M_roundToInt()
/optee_os/lib/libutils/isoc/newlib/
H A Dstrlen.c83 #error long int is not a 32bit or 64bit type.
88 #error long int is not a 32bit or 64bit byte
H A Dstrcpy.c85 #error long int is not a 32bit or 64bit type.
90 #error long int is not a 32bit or 64bit byte
H A Dstrcmp.c88 #error long int is not a 32bit or 64bit type.
93 #error long int is not a 32bit or 64bit byte
H A Dstrncmp.c87 #error long int is not a 32bit or 64bit type.
92 #error long int is not a 32bit or 64bit byte
H A Dstrncpy.c91 #error long int is not a 32bit or 64bit type.
96 #error long int is not a 32bit or 64bit byte
H A Dmemchr.c92 #error long int is not a 32bit or 64bit type.
97 #error long int is not a 32bit or 64bit byte
H A Dstrchr.c86 #error long int is not a 32bit or 64bit type.
/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c198 uint8_t bit; member
235 .bit = (_bit), \
247 .bit = (_bit), \
259 .bit = (_bit), \
271 .bit = (_bit), \
287 .bit = _offset ## _ ## _bit ## _POS, \
297 .bit = _offset ## _ ## _bit ## _POS, \
943 uint32_t bit = BIT(gate->bit); in __clk_enable() local
946 io_write32(base + gate->offset, bit); in __clk_enable()
948 io_setbits32_stm32shregs(base + gate->offset, bit); in __clk_enable()
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/optee_os/core/arch/arm/plat-zynqmp/
H A Dmain.c69 #error DDR size over 2 GiB is not supported in 32 bit ARM mode
/optee_os/lib/libmbedtls/mbedtls/library/
H A Dasn1write.c276 unsigned char bit; in mbedtls_asn1_write_named_bitstring() local
291 bit = cur_byte_shifted & 0x1; in mbedtls_asn1_write_named_bitstring()
294 if (bit != 0) { in mbedtls_asn1_write_named_bitstring()
/optee_os/core/arch/arm/plat-hikey/
H A Dplatform_config.h147 #error 32-bit TEE with CFG_CORE_DYN_SHM and without CFG_LARGE_PHYS_ADDR \
/optee_os/core/drivers/
H A Dbcm_sotp.c60 static TEE_Result otp_status_done_wait(vaddr_t addr, uint32_t bit) in otp_status_done_wait() argument
64 while (!(io_read32(addr) & bit)) in otp_status_done_wait()
H A Dstm32_bsec.c207 uint32_t bit = BIT(otp_id & BSEC_OTP_MASK); in check_no_error() local
210 if (io_read32(bsec_base() + BSEC_ERROR_OFF + bank) & bit) in check_no_error()
214 io_read32(bsec_base() + BSEC_DISTURBED_OFF + bank) & bit) in check_no_error()
H A Dversal_nvm.c624 uint32_t bit = 0; in versal_efuse_write_revoke_id() local
627 bit = id & (NVM_WORD_LEN - 1); in versal_efuse_write_revoke_id()
629 cfg.revoke_id[row] = BIT(bit); in versal_efuse_write_revoke_id()
/optee_os/core/drivers/crypto/stm32/
H A Dstm32_saes.c1140 uint8_t bit = 0; in stm32_saes_cmac_prf_128() local
1157 bit = 0; in stm32_saes_cmac_prf_128()
1159 k1[i] = (l[i] << 1) | bit; in stm32_saes_cmac_prf_128()
1160 bit = (l[i] & 0x80) >> 7; in stm32_saes_cmac_prf_128()
1167 bit = 0; in stm32_saes_cmac_prf_128()
1169 k2[i] = (k1[i] << 1) | bit; in stm32_saes_cmac_prf_128()
1170 bit = (k1[i] & 0x80) >> 7; in stm32_saes_cmac_prf_128()
/optee_os/core/lib/libtomcrypt/
H A Dsub.mk199 srcs-y += src/pk/asn1/der/bit/der_decode_bit_string.c
200 srcs-y += src/pk/asn1/der/bit/der_encode_bit_string.c
201 srcs-y += src/pk/asn1/der/bit/der_length_bit_string.c
202 srcs-y += src/pk/asn1/der/bit/der_decode_raw_bit_string.c
203 srcs-y += src/pk/asn1/der/bit/der_encode_raw_bit_string.c
/optee_os/core/lib/libtomcrypt/src/headers/
H A Dtomcrypt_cfg.h275 #error Cannot be 32 and 64 bit words...
/optee_os/core/arch/arm/dts/
H A Dfsl-lx2160a-qds.dts234 <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
/optee_os/core/lib/qcbor/
H A DREADME.md58 code is less than 4KB on 64-bit x86 CPUs. The design is such that
131 is a bit more powerful, so you get value for the extra code brought
154 unsigned 64-bit integer, signed 64-bit integer, floating-point number,
380 These are approximate sizes on a 64-bit x86 CPU with the -Os optimization.
533 * Tamas Ban for porting to TF-M and 32-bit ARM
/optee_os/lib/libmbedtls/mbedtls/
H A DChangeLog204 and MBEDTLS_MPI_MAX_SIZE is smaller than needed for a 4096-bit RSA key.
430 when compiling for Thumb (T32) or 32-bit Arm (A32).
441 AES when compiling for Thumb (T32) or 32-bit Arm (A32).
465 hardware accelerated AES is not present (around 13-23% on 64-bit Arm).
479 * Add support for using AES-CBC 128, 192, and 256 bit schemes
492 * Add support for 8-bit GCM tables for Shoup's algorithm to speedup GCM
494 performance by around 30% on 64-bit Intel; 125% on Armv7-M.
504 the MBEDTLS_X509_EXT_BASIC_CONSTRAINTS bit in the certificate's
766 * Add support to restrict AES to 128-bit keys in order to save code size.
845 implementations for 32- and 64-bit Arm and for x86 and x86-64, which are
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