| /optee_os/core/drivers/rstctrl/ |
| H A D | stm32mp21_rstctrl.c | 85 #define STM32_RESET(id, _offset, _bit_index, _set_clr, _inverted, _no_deassert,\ argument
88 .offset = (_offset),\
96 #define RST(id, _offset, _bit_index)\ argument
97 STM32_RESET((id), (_offset), (_bit_index), false, false, false, false)
99 #define RST_SETR(id, _offset, _bit_index)\ argument
100 STM32_RESET((id), (_offset), (_bit_index), true, false, false, false)
102 #define RST_INV(id, _offset, _bit_index)\ argument
103 STM32_RESET((id), (_offset), (_bit_index), false, true, false, false)
105 #define RST_SETR_NO_DEASSERT(id, _offset, _bit_index)\ argument
106 STM32_RESET((id), (_offset), (_bit_index), false, false, true, false)
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| H A D | stm32mp25_rstctrl.c | 85 #define STM32_RESET(id, _offset, _bit_index, _set_clr, _inverted, _no_deassert,\ argument
88 .offset = (_offset),\
96 #define RST(id, _offset, _bit_index)\ argument
97 STM32_RESET((id), (_offset), (_bit_index), false, false, false, false)
99 #define RST_SETR(id, _offset, _bit_index)\ argument
100 STM32_RESET((id), (_offset), (_bit_index), true, false, false, false)
102 #define RST_INV(id, _offset, _bit_index)\ argument
103 STM32_RESET((id), (_offset), (_bit_index), false, true, false, false)
105 #define RST_SETR_NO_DEASSERT(id, _offset, _bit_index)\ argument
106 STM32_RESET((id), (_offset), (_bit_index), false, false, true, false)
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| /optee_os/core/drivers/crypto/caam/include/ |
| H A D | caam_pwr.h | 25 #define BACKUP_REG(_offset, _nbregs, _mask_clr, _mask_set) \ argument
27 .offset = _offset, .nbregs = _nbregs, .mask_clr = _mask_clr, \
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| /optee_os/scripts/ |
| H A D | sign_rproc_fw.py | 212 self._offset = 0
237 struct.pack_into('<I', self._bufview_, self._offset,
239 self._offset += 4
240 struct.pack_into('<7I', self._bufview_, self._offset,
245 self._offset += 28
246 struct.pack_into('<32B', self._bufview_, self._offset, *seg.hash)
247 self._offset += 32
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| /optee_os/core/drivers/clk/ |
| H A D | clk-stm32mp15.c | 232 #define _CLK_SELEC(_sec, _offset, _bit, _clock_id, _parent_sel) \ argument
234 .offset = (_offset), \
244 #define _CLK_FIXED(_sec, _offset, _bit, _clock_id, _parent) \ argument
246 .offset = (_offset), \
256 #define _CLK_SC_SELEC(_sec, _offset, _bit, _clock_id, _parent_sel) \ argument
258 .offset = (_offset), \
268 #define _CLK_SC_FIXED(_sec, _offset, _bit, _clock_id, _parent) \ argument
270 .offset = (_offset), \
283 #define _CLK_SC2_SELEC(_sec, _offset, _bit, _clock_id, _parent_sel) \ argument
285 .offset = (_offset), \
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| H A D | clk-stm32mp13.c | 270 #define GATE_CFG(_id, _offset, _bit_idx, _offset_clr)\ argument
272 .offset = (_offset),\
444 #define MUXRDY_CFG(_id, _offset, _shift, _witdh, _rdy)\ argument
446 .offset = (_offset),\
452 #define MUX_CFG(_id, _offset, _shift, _witdh)\ argument
453 MUXRDY_CFG(_id, _offset, _shift, _witdh, MUX_NO_RDY)
527 #define DIVRDY_CFG(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
529 .offset = (_offset),\
537 #define DIV_CFG(_id, _offset, _shift, _width, _flags, _table)\ argument
538 DIVRDY_CFG(_id, _offset, _shift, _width, _flags, _table, DIV_NO_RDY)
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| H A D | clk-stm32mp21.c | 382 #define GATE_CFG(_id, _offset, _bit_idx, _offset_clr)\ argument
384 .offset = (_offset),\
566 #define _MUX_CFG(_id, _offset, _shift, _width, _rdy)\ argument
568 .offset = (_offset),\
611 #define _DIV_CFG(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
613 .offset = (_offset),\
674 #define BYPASS(_offset, _bit_byp, _bit_digbyp) \ argument
676 .offset = (_offset),\
681 #define CSS(_offset, _bit_css) \ argument
683 .offset = (_offset),\
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| H A D | clk-stm32mp25.c | 372 #define GATE_CFG(_id, _offset, _bit_idx, _offset_clr)\ argument
374 .offset = (_offset),\
601 #define _MUX_CFG(_id, _offset, _shift, _width, _rdy)\ argument
603 .offset = (_offset),\
651 #define _DIV_CFG(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument
653 .offset = (_offset),\
712 #define BYPASS(_offset, _bit_byp, _bit_digbyp) \ argument
714 .offset = (_offset),\
719 #define CSS(_offset, _bit_css) \ argument
721 .offset = (_offset),\
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