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Searched refs:RCC_APB5DIVR (Results 1 – 6 of 6) sorted by relevance

/optee_os/core/include/drivers/
H A Dstm32mp1_rcc.h24 #define RCC_APB5DIVR 0x40 macro
H A Dstm32mp21_rcc.h279 #define RCC_APB5DIVR U(0x4BC) macro
H A Dstm32mp13_rcc.h70 #define RCC_APB5DIVR U(0x580) macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c798 reg = io_read32(rcc_base + RCC_APB5DIVR); in get_clock_rate()
H A Dclk-stm32mp13.c303 GATE_CFG(GATE_APB5DIVRDY, RCC_APB5DIVR, 31, 0),
555 DIVRDY_CFG(DIV_APB5, RCC_APB5DIVR, 0, 3, 0, apb_div_table,
H A Dclk-stm32mp21.c430 GATE_CFG(GATE_APB5DIV_RDY, RCC_APB5DIVR, 31, 0),
631 _DIV_CFG(DIV_APB5, RCC_APB5DIVR, 0, 3, 0, apb_div_table,