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Searched refs:MUX_ADC1 (Results 1 – 5 of 5) sorted by relevance

/optee_os/core/include/dt-bindings/clock/
H A Dstm32mp13-clksrc.h93 #define MUX_ADC1 10 macro
132 #define MUX_KERNEL_BEGIN MUX_ADC1
315 #define CLK_ADC1_PLL4R CLKSRC(MUX_ADC1, 0)
316 #define CLK_ADC1_CKPER CLKSRC(MUX_ADC1, 1)
317 #define CLK_ADC1_PLL3Q CLKSRC(MUX_ADC1, 2)
H A Dstm32mp21-clksrc.h77 #define MUX_ADC1 12 macro
/optee_os/core/arch/arm/dts/
H A Dstm32mp215f-dk-ca35tdcid-rcc.dtsi100 MUX_CFG(MUX_ADC1, MUX_ADC1_FLEX46)
/optee_os/core/drivers/clk/
H A Dclk-stm32mp13.c462 MUX_CFG(MUX_ADC1, RCC_ADC12CKSELR, 0, 2),
2431 0, GATE_ADC1, MUX_ADC1);
H A Dclk-stm32mp21.c587 _MUX_CFG(MUX_ADC1, RCC_ADC1CFGR, 12, 1, MUX_NO_RDY),
2989 0, GATE_ADC1, NO_DIV, MUX_ADC1);