Searched refs:udivslot (Results 1 – 4 of 4) sorted by relevance
58 save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT); in s3c_pm_save_uarts()78 __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT); in s3c_pm_restore_uarts()
44 static const int udivslot[] = { variable84 writew(udivslot[val % 16], &uart->rest.slot); in s5p_serial_baud()
34 u32 udivslot; member
1388 unsigned int udivslot = 0; in s3c24xx_serial_set_termios() local1427 udivslot = (div & 15); in s3c24xx_serial_set_termios()1428 dev_dbg(port->dev, "fracval = %04x\n", udivslot); in s3c24xx_serial_set_termios()1430 udivslot = udivslot_table[div & 15]; in s3c24xx_serial_set_termios()1432 udivslot, div & 15); in s3c24xx_serial_set_termios()1475 ulcon, quot, udivslot); in s3c24xx_serial_set_termios()1494 wr_regl(port, S3C2443_DIVSLOT, udivslot); in s3c24xx_serial_set_termios()