1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2009 SAMSUNG Electronics
3*4882a593Smuzhiyun * Minkyu Kang <mk7.kang@samsung.com>
4*4882a593Smuzhiyun * Heungjun Kim <riverful.kim@samsung.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * based on drivers/serial/s3c64xx.c
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <dm.h>
13*4882a593Smuzhiyun #include <errno.h>
14*4882a593Smuzhiyun #include <fdtdec.h>
15*4882a593Smuzhiyun #include <linux/compiler.h>
16*4882a593Smuzhiyun #include <asm/io.h>
17*4882a593Smuzhiyun #include <asm/arch/clk.h>
18*4882a593Smuzhiyun #include <asm/arch/uart.h>
19*4882a593Smuzhiyun #include <serial.h>
20*4882a593Smuzhiyun #include <clk.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define RX_FIFO_COUNT_SHIFT 0
25*4882a593Smuzhiyun #define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
26*4882a593Smuzhiyun #define RX_FIFO_FULL (1 << 8)
27*4882a593Smuzhiyun #define TX_FIFO_COUNT_SHIFT 16
28*4882a593Smuzhiyun #define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
29*4882a593Smuzhiyun #define TX_FIFO_FULL (1 << 24)
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* Information about a serial port */
32*4882a593Smuzhiyun struct s5p_serial_platdata {
33*4882a593Smuzhiyun struct s5p_uart *reg; /* address of registers in physical memory */
34*4882a593Smuzhiyun u8 port_id; /* uart port number */
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * The coefficient, used to calculate the baudrate on S5P UARTs is
39*4882a593Smuzhiyun * calculated as
40*4882a593Smuzhiyun * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
41*4882a593Smuzhiyun * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
42*4882a593Smuzhiyun * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun static const int udivslot[] = {
45*4882a593Smuzhiyun 0,
46*4882a593Smuzhiyun 0x0080,
47*4882a593Smuzhiyun 0x0808,
48*4882a593Smuzhiyun 0x0888,
49*4882a593Smuzhiyun 0x2222,
50*4882a593Smuzhiyun 0x4924,
51*4882a593Smuzhiyun 0x4a52,
52*4882a593Smuzhiyun 0x54aa,
53*4882a593Smuzhiyun 0x5555,
54*4882a593Smuzhiyun 0xd555,
55*4882a593Smuzhiyun 0xd5d5,
56*4882a593Smuzhiyun 0xddd5,
57*4882a593Smuzhiyun 0xdddd,
58*4882a593Smuzhiyun 0xdfdd,
59*4882a593Smuzhiyun 0xdfdf,
60*4882a593Smuzhiyun 0xffdf,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
s5p_serial_init(struct s5p_uart * uart)63*4882a593Smuzhiyun static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun /* enable FIFOs, auto clear Rx FIFO */
66*4882a593Smuzhiyun writel(0x3, &uart->ufcon);
67*4882a593Smuzhiyun writel(0, &uart->umcon);
68*4882a593Smuzhiyun /* 8N1 */
69*4882a593Smuzhiyun writel(0x3, &uart->ulcon);
70*4882a593Smuzhiyun /* No interrupts, no DMA, pure polling */
71*4882a593Smuzhiyun writel(0x245, &uart->ucon);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
s5p_serial_baud(struct s5p_uart * uart,uint uclk,int baudrate)74*4882a593Smuzhiyun static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
75*4882a593Smuzhiyun int baudrate)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun u32 val;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun val = uclk / baudrate;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun writel(val / 16 - 1, &uart->ubrdiv);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (s5p_uart_divslot())
84*4882a593Smuzhiyun writew(udivslot[val % 16], &uart->rest.slot);
85*4882a593Smuzhiyun else
86*4882a593Smuzhiyun writeb(val % 16, &uart->rest.value);
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD
s5p_serial_setbrg(struct udevice * dev,int baudrate)90*4882a593Smuzhiyun int s5p_serial_setbrg(struct udevice *dev, int baudrate)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun struct s5p_serial_platdata *plat = dev->platdata;
93*4882a593Smuzhiyun struct s5p_uart *const uart = plat->reg;
94*4882a593Smuzhiyun u32 uclk;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun #ifdef CONFIG_CLK_EXYNOS
97*4882a593Smuzhiyun struct clk clk;
98*4882a593Smuzhiyun u32 ret;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun ret = clk_get_by_index(dev, 1, &clk);
101*4882a593Smuzhiyun if (ret < 0)
102*4882a593Smuzhiyun return ret;
103*4882a593Smuzhiyun uclk = clk_get_rate(&clk);
104*4882a593Smuzhiyun #else
105*4882a593Smuzhiyun uclk = get_uart_clk(plat->port_id);
106*4882a593Smuzhiyun #endif
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun s5p_serial_baud(uart, uclk, baudrate);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return 0;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
s5p_serial_probe(struct udevice * dev)113*4882a593Smuzhiyun static int s5p_serial_probe(struct udevice *dev)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct s5p_serial_platdata *plat = dev->platdata;
116*4882a593Smuzhiyun struct s5p_uart *const uart = plat->reg;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun s5p_serial_init(uart);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
serial_err_check(const struct s5p_uart * const uart,int op)123*4882a593Smuzhiyun static int serial_err_check(const struct s5p_uart *const uart, int op)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun unsigned int mask;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /*
128*4882a593Smuzhiyun * UERSTAT
129*4882a593Smuzhiyun * Break Detect [3]
130*4882a593Smuzhiyun * Frame Err [2] : receive operation
131*4882a593Smuzhiyun * Parity Err [1] : receive operation
132*4882a593Smuzhiyun * Overrun Err [0] : receive operation
133*4882a593Smuzhiyun */
134*4882a593Smuzhiyun if (op)
135*4882a593Smuzhiyun mask = 0x8;
136*4882a593Smuzhiyun else
137*4882a593Smuzhiyun mask = 0xf;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return readl(&uart->uerstat) & mask;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
s5p_serial_getc(struct udevice * dev)142*4882a593Smuzhiyun static int s5p_serial_getc(struct udevice *dev)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct s5p_serial_platdata *plat = dev->platdata;
145*4882a593Smuzhiyun struct s5p_uart *const uart = plat->reg;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
148*4882a593Smuzhiyun return -EAGAIN;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun serial_err_check(uart, 0);
151*4882a593Smuzhiyun return (int)(readb(&uart->urxh) & 0xff);
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
s5p_serial_putc(struct udevice * dev,const char ch)154*4882a593Smuzhiyun static int s5p_serial_putc(struct udevice *dev, const char ch)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun struct s5p_serial_platdata *plat = dev->platdata;
157*4882a593Smuzhiyun struct s5p_uart *const uart = plat->reg;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (readl(&uart->ufstat) & TX_FIFO_FULL)
160*4882a593Smuzhiyun return -EAGAIN;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun writeb(ch, &uart->utxh);
163*4882a593Smuzhiyun serial_err_check(uart, 1);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
s5p_serial_pending(struct udevice * dev,bool input)168*4882a593Smuzhiyun static int s5p_serial_pending(struct udevice *dev, bool input)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct s5p_serial_platdata *plat = dev->platdata;
171*4882a593Smuzhiyun struct s5p_uart *const uart = plat->reg;
172*4882a593Smuzhiyun uint32_t ufstat = readl(&uart->ufstat);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun if (input)
175*4882a593Smuzhiyun return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
176*4882a593Smuzhiyun else
177*4882a593Smuzhiyun return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
s5p_serial_ofdata_to_platdata(struct udevice * dev)180*4882a593Smuzhiyun static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct s5p_serial_platdata *plat = dev->platdata;
183*4882a593Smuzhiyun fdt_addr_t addr;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun addr = devfdt_get_addr(dev);
186*4882a593Smuzhiyun if (addr == FDT_ADDR_T_NONE)
187*4882a593Smuzhiyun return -EINVAL;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun plat->reg = (struct s5p_uart *)addr;
190*4882a593Smuzhiyun plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
191*4882a593Smuzhiyun "id", dev->seq);
192*4882a593Smuzhiyun return 0;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static const struct dm_serial_ops s5p_serial_ops = {
196*4882a593Smuzhiyun .putc = s5p_serial_putc,
197*4882a593Smuzhiyun .pending = s5p_serial_pending,
198*4882a593Smuzhiyun .getc = s5p_serial_getc,
199*4882a593Smuzhiyun .setbrg = s5p_serial_setbrg,
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun static const struct udevice_id s5p_serial_ids[] = {
203*4882a593Smuzhiyun { .compatible = "samsung,exynos4210-uart" },
204*4882a593Smuzhiyun { }
205*4882a593Smuzhiyun };
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun U_BOOT_DRIVER(serial_s5p) = {
208*4882a593Smuzhiyun .name = "serial_s5p",
209*4882a593Smuzhiyun .id = UCLASS_SERIAL,
210*4882a593Smuzhiyun .of_match = s5p_serial_ids,
211*4882a593Smuzhiyun .ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
212*4882a593Smuzhiyun .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
213*4882a593Smuzhiyun .probe = s5p_serial_probe,
214*4882a593Smuzhiyun .ops = &s5p_serial_ops,
215*4882a593Smuzhiyun .flags = DM_FLAG_PRE_RELOC,
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun #endif
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_UART_S5P
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun #include <debug_uart.h>
222*4882a593Smuzhiyun
_debug_uart_init(void)223*4882a593Smuzhiyun static inline void _debug_uart_init(void)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun s5p_serial_init(uart);
228*4882a593Smuzhiyun s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
_debug_uart_putc(int ch)231*4882a593Smuzhiyun static inline void _debug_uart_putc(int ch)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun while (readl(&uart->ufstat) & TX_FIFO_FULL);
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun writeb(ch, &uart->utxh);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun DEBUG_UART_FUNCS
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun #endif
243