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Searched refs:sel_shift (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3528.c328 u32 sel_mask = 0, sel_shift; in rk3528_cgpll_matrix_get_rate() local
365 sel_shift = CLK_MATRIX_250M_SRC_SEL_SHIFT; in rk3528_cgpll_matrix_get_rate()
392 sel_shift = CLK_MATRIX_500M_SRC_SEL_SHIFT; in rk3528_cgpll_matrix_get_rate()
413 sel = (readl(&cru->clksel_con[con]) & sel_mask) >> sel_shift; in rk3528_cgpll_matrix_get_rate()
436 u32 sel_mask = 0, sel_shift; in rk3528_cgpll_matrix_set_rate() local
473 sel_shift = CLK_MATRIX_250M_SRC_SEL_SHIFT; in rk3528_cgpll_matrix_set_rate()
500 sel_shift = CLK_MATRIX_500M_SRC_SEL_SHIFT; in rk3528_cgpll_matrix_set_rate()
543 rk_clrsetreg(&cru->clksel_con[con], sel_mask, sel << sel_shift); in rk3528_cgpll_matrix_set_rate()
1052 u32 sel_mask, sel_shift; in rk3528_dclk_vop_get_clk() local
1060 sel_shift = DCLK_VOP_SRC0_SEL_SHIFT; in rk3528_dclk_vop_get_clk()
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H A Dclk_rk3399.c671 uint8_t sel_shift; member
683 .sel_shift = CLK_SPI0_PLL_SEL_SHIFT, },
686 .sel_shift = CLK_SPI1_PLL_SEL_SHIFT, },
689 .sel_shift = CLK_SPI2_PLL_SEL_SHIFT, },
692 .sel_shift = CLK_SPI4_PLL_SEL_SHIFT, },
695 .sel_shift = CLK_SPI5_PLL_SEL_SHIFT, },
740 (CLK_SPI_PLL_SEL_GPLL << spiclk->sel_shift)), in rk3399_spi_set_clk()
742 (CLK_SPI_PLL_SEL_GPLL << spiclk->sel_shift))); in rk3399_spi_set_clk()
H A Dclk_rk3368.c497 uint8_t sel_shift; member
504 [0] = { .reg = 45, .div_shift = 0, .sel_shift = 7, },
505 [1] = { .reg = 45, .div_shift = 8, .sel_shift = 15, },
506 [2] = { .reg = 46, .div_shift = 8, .sel_shift = 15, },
556 (0x1 << spiclk->sel_shift)), in rk3368_spi_set_clk()
558 (1 << spiclk->sel_shift))); in rk3368_spi_set_clk()
H A Dclk_rk3588.c1114 u32 mask, div_shift, sel_shift; in rk3588_dclk_vop_set_clk() local
1124 sel_shift = DCLK0_VOP_SRC_SEL_SHIFT; in rk3588_dclk_vop_set_clk()
1133 sel_shift = DCLK1_VOP_SRC_SEL_SHIFT; in rk3588_dclk_vop_set_clk()
1142 sel_shift = DCLK2_VOP_SRC_SEL_SHIFT; in rk3588_dclk_vop_set_clk()
1150 sel_shift = DCLK3_VOP_SRC_SEL_SHIFT; in rk3588_dclk_vop_set_clk()
1163 DCLK_VOP_SRC_SEL_V0PLL << sel_shift | in rk3588_dclk_vop_set_clk()
1169 DCLK_VOP_SRC_SEL_V0PLL << sel_shift | in rk3588_dclk_vop_set_clk()
1210 best_sel << sel_shift | in rk3588_dclk_vop_set_clk()
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dwm8580.c755 int ret, sel, sel_mask, sel_shift; in wm8580_set_sysclk() local
760 sel_shift = 0; in wm8580_set_sysclk()
765 sel_shift = 2; in wm8580_set_sysclk()
777 sel = 0 << sel_shift; in wm8580_set_sysclk()
780 sel = 1 << sel_shift; in wm8580_set_sysclk()
783 sel = 2 << sel_shift; in wm8580_set_sysclk()
786 sel = 3 << sel_shift; in wm8580_set_sysclk()
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-pvtm.c30 u32 sel_shift; member
84 pvtm->info->sel_shift, in rockchip_clock_sel_internal_pvtm()
201 .sel_shift = 6,