328 	u32 sel_mask = 0, sel_shift;  in rk3528_cgpll_matrix_get_rate()  local
365 		sel_shift = CLK_MATRIX_250M_SRC_SEL_SHIFT;  in rk3528_cgpll_matrix_get_rate()
392 		sel_shift = CLK_MATRIX_500M_SRC_SEL_SHIFT;  in rk3528_cgpll_matrix_get_rate()
413 		sel = (readl(&cru->clksel_con[con]) & sel_mask) >> sel_shift;  in rk3528_cgpll_matrix_get_rate()
436 	u32 sel_mask = 0, sel_shift;  in rk3528_cgpll_matrix_set_rate()  local
473 		sel_shift = CLK_MATRIX_250M_SRC_SEL_SHIFT;  in rk3528_cgpll_matrix_set_rate()
500 		sel_shift = CLK_MATRIX_500M_SRC_SEL_SHIFT;  in rk3528_cgpll_matrix_set_rate()
543 		rk_clrsetreg(&cru->clksel_con[con], sel_mask, sel << sel_shift);  in rk3528_cgpll_matrix_set_rate()
1052 	u32 sel_mask, sel_shift;  in rk3528_dclk_vop_get_clk()  local
1060 		sel_shift = DCLK_VOP_SRC0_SEL_SHIFT;  in rk3528_dclk_vop_get_clk()
1069 		sel_shift = DCLK_VOP_SRC1_SEL_SHIFT;  in rk3528_dclk_vop_get_clk()
1080 	sel = (con & sel_mask) >> sel_shift;  in rk3528_dclk_vop_get_clk()
1094 	u32 sel_mask, sel_shift;  in rk3528_dclk_vop_set_clk()  local
1102 		sel_shift = DCLK_VOP_SRC0_SEL_SHIFT;  in rk3528_dclk_vop_set_clk()
1111 		sel_shift = DCLK_VOP_SRC1_SEL_SHIFT;  in rk3528_dclk_vop_set_clk()
1122 		sel = (DCLK_VOP_SRC_SEL_CLK_GPLL_MUX << sel_shift) & sel_mask;  in rk3528_dclk_vop_set_clk()
1125 		sel = (DCLK_VOP_SRC_SEL_CLK_CPLL_MUX << sel_shift) & sel_mask;  in rk3528_dclk_vop_set_clk()
1137 	u32 sel_shift, sel_mask, div_shift, div_mask;  in rk3528_uart_get_rate()  local
1144 		sel_shift = SCLK_UART0_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1152 		sel_shift = SCLK_UART1_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1160 		sel_shift = SCLK_UART2_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1168 		sel_shift = SCLK_UART3_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1176 		sel_shift = SCLK_UART4_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1184 		sel_shift = SCLK_UART5_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1192 		sel_shift = SCLK_UART6_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1200 		sel_shift = SCLK_UART7_SRC_SEL_SHIFT;  in rk3528_uart_get_rate()
1214 	sel = (con & sel_mask) >> sel_shift;  in rk3528_uart_get_rate()
1234 	u32 sel_shift, sel_mask, div_shift, div_mask;  in rk3528_uart_set_rate()  local
1256 		sel_shift = SCLK_UART0_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1264 		sel_shift = SCLK_UART1_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1272 		sel_shift = SCLK_UART2_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1280 		sel_shift = SCLK_UART3_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1288 		sel_shift = SCLK_UART4_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1296 		sel_shift = SCLK_UART5_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1304 		sel_shift = SCLK_UART6_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1312 		sel_shift = SCLK_UART7_SRC_SEL_SHIFT;  in rk3528_uart_set_rate()
1323 	rk_clrsetreg(&cru->clksel_con[id], sel_mask, sel << sel_shift);  in rk3528_uart_set_rate()