Searched refs:sc_hiz_tile_fifo_size (Results 1 – 13 of 13) sorted by relevance
1213 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1233 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1257 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1277 rdev->config.rv770.sc_hiz_tile_fifo_size = 0x30; in rv770_gpu_init()1453 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | in rv770_gpu_init()
3174 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3196 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3218 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3241 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3263 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3291 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3313 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3335 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3357 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()3379 rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; in evergreen_gpu_init()[all …]
2058 unsigned sc_hiz_tile_fifo_size; member2085 unsigned sc_hiz_tile_fifo_size; member2113 unsigned sc_hiz_tile_fifo_size; member2146 unsigned sc_hiz_tile_fifo_size; member2177 unsigned sc_hiz_tile_fifo_size; member
924 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()998 rdev->config.cayman.sc_hiz_tile_fifo_size = 0x30; in cayman_gpu_init()1201 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_hiz_tile_fifo_size) | in cayman_gpu_init()
3116 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3133 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3151 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3168 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3185 rdev->config.si.sc_hiz_tile_fifo_size = 0x30; in si_gpu_init()3320 SC_HIZ_TILE_FIFO_SIZE(rdev->config.si.sc_hiz_tile_fifo_size) | in si_gpu_init()
3200 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3217 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3234 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3253 rdev->config.cik.sc_hiz_tile_fifo_size = 0x30; in cik_gpu_init()3388 SC_HIZ_TILE_FIFO_SIZE(rdev->config.cik.sc_hiz_tile_fifo_size) | in cik_gpu_init()
152 unsigned sc_hiz_tile_fifo_size; member
1598 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1615 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1632 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1649 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1666 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v6_0_constants_init()1747 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v6_0_constants_init()
1706 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1723 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1738 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1753 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1770 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1787 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1804 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()1821 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v8_0_gpu_early_init()3832 (adev->gfx.config.sc_hiz_tile_fifo_size << in gfx_v8_0_constants_init()
2018 (adev->gfx.config.sc_hiz_tile_fifo_size << PA_SC_FIFO_SIZE__SC_HIZ_TILE_FIFO_SIZE__SHIFT) | in gfx_v7_0_constants_init()4288 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4305 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4322 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()4341 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v7_0_gpu_early_init()
2120 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2128 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2137 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2151 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2163 adev->gfx.config.sc_hiz_tile_fifo_size = 0x30; in gfx_v9_0_gpu_early_init()2173 adev->gfx.config.sc_hiz_tile_fifo_size = 0x80; in gfx_v9_0_gpu_early_init()
720 config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size; in amdgpu_debugfs_gca_config_read()
4241 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()4250 adev->gfx.config.sc_hiz_tile_fifo_size = 0; in gfx_v10_0_gpu_early_init()