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Searched refs:sample_clk (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Ddw_mmc-hi3798cv200.c22 struct clk *sample_clk; member
78 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
115 clk_set_phase(priv->sample_clk, degrees[i]); in dw_mci_hi3798cv200_execute_tuning()
136 priv->sample_clk = devm_clk_get(host->dev, "ciu-sample"); in dw_mci_hi3798cv200_init()
137 if (IS_ERR(priv->sample_clk)) { in dw_mci_hi3798cv200_init()
139 return PTR_ERR(priv->sample_clk); in dw_mci_hi3798cv200_init()
148 ret = clk_prepare_enable(priv->sample_clk); in dw_mci_hi3798cv200_init()
164 clk_disable_unprepare(priv->sample_clk); in dw_mci_hi3798cv200_init()
187 clk_disable_unprepare(priv->sample_clk); in dw_mci_hi3798cv200_remove()
H A Ddw_mmc-rockchip.c23 struct clk *sample_clk; member
73 if (!IS_ERR(priv->sample_clk) && ios->timing <= MMC_TIMING_SD_HS) in dw_mci_rk3288_set_ios()
74 clk_set_phase(priv->sample_clk, priv->default_sample_phase); in dw_mci_rk3288_set_ios()
155 i = clk_get_phase(priv->sample_clk) / 90; in dw_mci_v2_execute_tuning()
171 clk_set_phase(priv->sample_clk, degree); in dw_mci_v2_execute_tuning()
180 clk_set_phase(priv->sample_clk, degree); in dw_mci_v2_execute_tuning()
216 if (IS_ERR(priv->sample_clk)) { in dw_mci_rk3288_execute_tuning()
238 clk_set_phase(priv->sample_clk, in dw_mci_rk3288_execute_tuning()
285 clk_set_phase(priv->sample_clk, priv->default_sample_phase); in dw_mci_rk3288_execute_tuning()
345 clk_set_phase(priv->sample_clk, real_middle_phase); in dw_mci_rk3288_execute_tuning()
[all …]
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Drockchip_dw_mmc.c33 struct clk sample_clk; member
134 if (IS_ERR(&priv->sample_clk)) in rockchip_dwmmc_execute_tuning()
138 ret = clk_set_phase(&priv->sample_clk, mmc->default_phase); in rockchip_dwmmc_execute_tuning()
157 ret = clk_set_phase(&priv->sample_clk, 90 * mmc->init_retry); in rockchip_dwmmc_execute_tuning()
210 ret = clk_get_by_name(dev, "ciu-sample", &priv->sample_clk); in rockchip_dwmmc_probe()
243 if (!(ret < 0) && (&priv->sample_clk)) { in rockchip_dwmmc_probe()
244 ret = clk_set_phase(&priv->sample_clk, plat->mmc.default_phase); in rockchip_dwmmc_probe()