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Searched refs:rockchip_pll_set_rate (Results 1 – 20 of 20) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h143 static inline int rockchip_pll_set_rate(struct rockchip_pll_clock *pll, in rockchip_pll_set_rate() function
157 int rockchip_pll_set_rate(struct rockchip_pll_clock *pll,
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk1808.c556 rockchip_pll_set_rate(&rk1808_pll_clks[NPLL], in rk1808_vop_set_clk()
574 rockchip_pll_set_rate(&rk1808_pll_clks[NPLL], in rk1808_vop_set_clk()
880 if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL], in rk1808_armclk_set_clk()
898 if (rockchip_pll_set_rate(&rk1808_pll_clks[APLL], in rk1808_armclk_set_clk()
1000 ret = rockchip_pll_set_rate(&rk1808_pll_clks[clk->id - 1], in rk1808_clk_set_rate()
1005 ret = rockchip_pll_set_rate(&rk1808_pll_clks[PPLL], in rk1808_clk_set_rate()
1009 ret = rockchip_pll_set_rate(&rk1808_pll_clks[CPLL], in rk1808_clk_set_rate()
1015 ret = rockchip_pll_set_rate(&rk1808_pll_clks[GPLL], in rk1808_clk_set_rate()
1021 ret = rockchip_pll_set_rate(&rk1808_pll_clks[NPLL], in rk1808_clk_set_rate()
1303 ret = rockchip_pll_set_rate(&rk1808_pll_clks[GPLL], in rk1808_clk_probe()
H A Dclk_rk322x.c112 if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL], in rk322x_armclk_set_clk()
132 if (rockchip_pll_set_rate(&rk322x_pll_clks[APLL], in rk322x_armclk_set_clk()
645 ret = rockchip_pll_set_rate(&rk322x_pll_clks[clk->id - 1], in rk322x_clk_set_rate()
649 ret = rockchip_pll_set_rate(&rk322x_pll_clks[CPLL], in rk322x_clk_set_rate()
654 ret = rockchip_pll_set_rate(&rk322x_pll_clks[GPLL], in rk322x_clk_set_rate()
674 ret = rockchip_pll_set_rate(&rk322x_pll_clks[DPLL], in rk322x_clk_set_rate()
992 rockchip_pll_set_rate(&rk322x_pll_clks[GPLL], in rkclk_init()
996 rockchip_pll_set_rate(&rk322x_pll_clks[CPLL], in rkclk_init()
H A Dclk_rk3128.c111 if (rockchip_pll_set_rate(&rk3128_pll_clks[APLL], in rk3128_armclk_set_clk()
131 if (rockchip_pll_set_rate(&rk3128_pll_clks[APLL], in rk3128_armclk_set_clk()
455 rockchip_pll_set_rate(&rk3128_pll_clks[CPLL], in rk3128_vop_set_clk()
602 ret = rockchip_pll_set_rate(&rk3128_pll_clks[clk->id - 1], in rk3128_clk_set_rate()
605 ret = rockchip_pll_set_rate(&rk3128_pll_clks[GPLL], in rk3128_clk_set_rate()
818 rockchip_pll_set_rate(&rk3128_pll_clks[GPLL], in rkclk_init()
837 rockchip_pll_set_rate(&rk3128_pll_clks[CPLL], in rkclk_init()
H A Dclk_rk3588.c1171 rockchip_pll_set_rate(&rk3588_pll_clks[V0PLL], in rk3588_dclk_vop_set_clk()
1673 ret = rockchip_pll_set_rate(&rk3588_pll_clks[CPLL], priv->cru, in rk3588_clk_set_rate()
1679 ret = rockchip_pll_set_rate(&rk3588_pll_clks[GPLL], priv->cru, in rk3588_clk_set_rate()
1685 ret = rockchip_pll_set_rate(&rk3588_pll_clks[NPLL], priv->cru, in rk3588_clk_set_rate()
1689 ret = rockchip_pll_set_rate(&rk3588_pll_clks[V0PLL], priv->cru, in rk3588_clk_set_rate()
1695 ret = rockchip_pll_set_rate(&rk3588_pll_clks[AUPLL], priv->cru, in rk3588_clk_set_rate()
1701 ret = rockchip_pll_set_rate(&rk3588_pll_clks[PPLL], priv->cru, in rk3588_clk_set_rate()
2033 ret = rockchip_pll_set_rate(&rk3588_pll_clks[CPLL], priv->cru, in rk3588_clk_init()
2039 ret = rockchip_pll_set_rate(&rk3588_pll_clks[GPLL], priv->cru, in rk3588_clk_init()
2047 ret = rockchip_pll_set_rate(&rk3588_pll_clks[PPLL], priv->cru, in rk3588_clk_init()
[all …]
H A Dclk_rk3328.c138 if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL], in rk3328_armclk_set_clk()
158 if (rockchip_pll_set_rate(&rk3328_pll_clks[NPLL], in rk3328_armclk_set_clk()
876 ret = rockchip_pll_set_rate(&rk3328_pll_clks[clk->id - 1], in rk3328_clk_set_rate()
880 ret = rockchip_pll_set_rate(&rk3328_pll_clks[CPLL], in rk3328_clk_set_rate()
885 ret = rockchip_pll_set_rate(&rk3328_pll_clks[GPLL], in rk3328_clk_set_rate()
1300 rockchip_pll_set_rate(&rk3328_pll_clks[GPLL], in rkclk_init()
1304 rockchip_pll_set_rate(&rk3328_pll_clks[CPLL], in rkclk_init()
H A Dclk_pll.su
H A Dclk_rk3562.c177 if (rockchip_pll_set_rate(&rk3562_pll_clks[APLL], in rk3562_armclk_set_rate()
192 if (rockchip_pll_set_rate(&rk3562_pll_clks[APLL], in rk3562_armclk_set_rate()
1205 rockchip_pll_set_rate(&rk3562_pll_clks[VPLL], priv->cru, in rk3562_vop_set_rate()
1494 ret = rockchip_pll_set_rate(&rk3562_pll_clks[GPLL], priv->cru, in rk3562_clk_set_rate()
1500 ret = rockchip_pll_set_rate(&rk3562_pll_clks[VPLL], priv->cru, in rk3562_clk_set_rate()
1506 ret = rockchip_pll_set_rate(&rk3562_pll_clks[HPLL], priv->cru, in rk3562_clk_set_rate()
1820 ret = rockchip_pll_set_rate(&rk3562_pll_clks[CPLL], priv->cru, in rk3562_clk_init()
1827 ret = rockchip_pll_set_rate(&rk3562_pll_clks[GPLL], priv->cru, in rk3562_clk_init()
1834 ret = rockchip_pll_set_rate(&rk3562_pll_clks[HPLL], priv->cru, in rk3562_clk_init()
H A Dclk_rk3568.c133 rockchip_pll_set_rate(&rk3568_pll_clks[pll_id], in rk3568_pmu_pll_set_rate()
422 ret = rockchip_pll_set_rate(&rk3568_pll_clks[PPLL], in rk3568_pmuclk_set_rate()
428 ret = rockchip_pll_set_rate(&rk3568_pll_clks[HPLL], in rk3568_pmuclk_set_rate()
490 ret = rockchip_pll_set_rate(&rk3568_pll_clks[PPLL], in rk3568_pmuclk_probe()
580 if (rockchip_pll_set_rate(&rk3568_pll_clks[APLL], in rk3568_armclk_set_clk()
608 if (rockchip_pll_set_rate(&rk3568_pll_clks[APLL], in rk3568_armclk_set_clk()
1850 rockchip_pll_set_rate(&rk3568_pll_clks[VPLL], in rk3568_dclk_vop_set_clk()
2703 ret = rockchip_pll_set_rate(&rk3568_pll_clks[CPLL], priv->cru, in rk3568_clk_set_rate()
2709 ret = rockchip_pll_set_rate(&rk3568_pll_clks[GPLL], priv->cru, in rk3568_clk_set_rate()
2715 ret = rockchip_pll_set_rate(&rk3568_pll_clks[NPLL], priv->cru, in rk3568_clk_set_rate()
[all …]
H A Dclk_rk3528.c212 if (rockchip_pll_set_rate(&rk3528_pll_clks[APLL], in rk3528_armclk_set_clk()
228 if (rockchip_pll_set_rate(&rk3528_pll_clks[APLL], in rk3528_armclk_set_clk()
1469 ret = rockchip_pll_set_rate(&rk3528_pll_clks[CPLL], priv->cru, in rk3528_clk_set_rate()
1475 ret = rockchip_pll_set_rate(&rk3528_pll_clks[GPLL], priv->cru, in rk3528_clk_set_rate()
1481 ret = rockchip_pll_set_rate(&rk3528_pll_clks[PPLL], priv->cru, in rk3528_clk_set_rate()
1893 ret = rockchip_pll_set_rate(&rk3528_pll_clks[CPLL], priv->cru, in rk3528_clk_init()
1900 ret = rockchip_pll_set_rate(&rk3528_pll_clks[GPLL], priv->cru, in rk3528_clk_init()
1907 ret = rockchip_pll_set_rate(&rk3528_pll_clks[PPLL], priv->cru, in rk3528_clk_init()
H A Dclk_rv1106.c1154 ret = rockchip_pll_set_rate(&rv1106_pll_clks[APLL], priv->cru, in rv1106_clk_set_rate()
1158 ret = rockchip_pll_set_rate(&rv1106_pll_clks[CPLL], priv->cru, in rv1106_clk_set_rate()
1162 ret = rockchip_pll_set_rate(&rv1106_pll_clks[GPLL], priv->cru, in rv1106_clk_set_rate()
1271 ret = rockchip_pll_set_rate(&rv1106_pll_clks[APLL], priv->cru, in rv1106_clk_init()
1278 ret = rockchip_pll_set_rate(&rv1106_pll_clks[CPLL], priv->cru, in rv1106_clk_init()
1285 ret = rockchip_pll_set_rate(&rv1106_pll_clks[GPLL], priv->cru, in rv1106_clk_init()
H A Dclk_rv1126.c576 if (rockchip_pll_set_rate(&rv1126_pll_clks[APLL], in rv1126_armclk_set_clk()
588 if (rockchip_pll_set_rate(&rv1126_pll_clks[APLL], in rv1126_armclk_set_clk()
1751 ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru, in rv1126_clk_set_rate()
1755 ret = rockchip_pll_set_rate(&rv1126_pll_clks[HPLL], priv->cru, in rv1126_clk_set_rate()
2087 if (rockchip_pll_set_rate(&rv1126_pll_clks[GPLL], in rv1126_gpll_set_rate()
2147 ret = rockchip_pll_set_rate(&rv1126_pll_clks[CPLL], priv->cru, in rv1126_clk_init()
2153 ret = rockchip_pll_set_rate(&rv1126_pll_clks[HPLL], priv->cru, in rv1126_clk_init()
H A Dclk_rk3308.c157 if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL], in rk3308_armclk_set_clk()
175 if (rockchip_pll_set_rate(&rk3308_pll_clks[APLL], in rk3308_armclk_set_clk()
1024 ret = rockchip_pll_set_rate(&rk3308_pll_clks[DPLL], priv->cru, in rk3308_clk_set_rate()
H A Dclk_pll.c593 int rockchip_pll_set_rate(struct rockchip_pll_clock *pll, in rockchip_pll_set_rate() function
/OK3568_Linux_fs/u-boot/spl/drivers/clk/rockchip/
H A Dclk_pll.su
/OK3568_Linux_fs/u-boot/spl/
H A Du-boot-spl.sym
H A Du-boot-spl.map
/OK3568_Linux_fs/u-boot/
H A DSystem.map
H A Du-boot.map
H A Du-boot.sym