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Searched refs:qm (Results 1 – 25 of 74) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/crypto/hisilicon/
H A Dqm.c318 struct hisi_qm *qm; member
324 int (*get_vft)(struct hisi_qm *qm, u32 *base, u32 *number);
325 void (*qm_db)(struct hisi_qm *qm, u16 qn,
327 u32 (*get_irq_num)(struct hisi_qm *qm);
328 int (*debug_init)(struct hisi_qm *qm);
329 void (*hw_error_init)(struct hisi_qm *qm, u32 ce, u32 nfe, u32 fe);
330 void (*hw_error_uninit)(struct hisi_qm *qm);
331 enum acc_err_result (*hw_error_handle)(struct hisi_qm *qm);
390 static bool qm_avail_state(struct hisi_qm *qm, enum qm_state new) in qm_avail_state() argument
392 enum qm_state curr = atomic_read(&qm->status.flags); in qm_avail_state()
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H A Dqm.h182 int (*hw_init)(struct hisi_qm *qm);
183 void (*hw_err_enable)(struct hisi_qm *qm);
184 void (*hw_err_disable)(struct hisi_qm *qm);
185 u32 (*get_dev_hw_err_status)(struct hisi_qm *qm);
186 void (*clear_dev_hw_err_status)(struct hisi_qm *qm, u32 err_sts);
187 void (*open_axi_master_ooo)(struct hisi_qm *qm);
188 void (*close_axi_master_ooo)(struct hisi_qm *qm);
189 void (*log_dev_hw_err)(struct hisi_qm *qm, u32 err_sts);
283 struct hisi_qm *qm; member
342 int hisi_qm_init(struct hisi_qm *qm);
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H A DMakefile6 hisi_qm-objs = qm.o sgl.o
/OK3568_Linux_fs/kernel/drivers/crypto/hisilicon/sec2/
H A Dsec_main.c87 #define SEC_ADDR(qm, offset) ((qm)->io_base + (offset) + \ argument
244 static u8 sec_get_endian(struct hisi_qm *qm) in sec_get_endian() argument
252 if (qm->pdev->is_virtfn) { in sec_get_endian()
253 dev_err_ratelimited(&qm->pdev->dev, in sec_get_endian()
257 reg = readl_relaxed(qm->io_base + SEC_ENGINE_PF_CFG_OFF + in sec_get_endian()
273 static int sec_engine_init(struct hisi_qm *qm) in sec_engine_init() argument
279 reg = readl_relaxed(SEC_ADDR(qm, SEC_CONTROL_REG)); in sec_engine_init()
281 writel_relaxed(reg, SEC_ADDR(qm, SEC_CONTROL_REG)); in sec_engine_init()
283 writel_relaxed(0x1, SEC_ADDR(qm, SEC_MEM_START_INIT_REG)); in sec_engine_init()
285 ret = readl_relaxed_poll_timeout(SEC_ADDR(qm, SEC_MEM_INIT_DONE_REG), in sec_engine_init()
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H A Dsec.h159 struct hisi_qm *qm; member
178 struct hisi_qm qm; member
/OK3568_Linux_fs/kernel/drivers/crypto/hisilicon/zip/
H A Dzip_main.c252 static int hisi_zip_set_user_domain_and_cache(struct hisi_qm *qm) in hisi_zip_set_user_domain_and_cache() argument
254 void __iomem *base = qm->io_base; in hisi_zip_set_user_domain_and_cache()
282 if (qm->use_sva) { in hisi_zip_set_user_domain_and_cache()
302 static void hisi_zip_hw_error_enable(struct hisi_qm *qm) in hisi_zip_hw_error_enable() argument
306 if (qm->ver == QM_HW_V1) { in hisi_zip_hw_error_enable()
308 qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_enable()
309 dev_info(&qm->pdev->dev, "Does not support hw error handle\n"); in hisi_zip_hw_error_enable()
314 writel(HZIP_CORE_INT_MASK_ALL, qm->io_base + HZIP_CORE_INT_SOURCE); in hisi_zip_hw_error_enable()
317 writel(0x1, qm->io_base + HZIP_CORE_INT_RAS_CE_ENB); in hisi_zip_hw_error_enable()
318 writel(0x0, qm->io_base + HZIP_CORE_INT_RAS_FE_ENB); in hisi_zip_hw_error_enable()
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H A Dzip_crypto.c156 struct device *dev = &qp->qm->pdev->dev; in hisi_zip_start_qp()
192 hisi_zip = container_of(qps[0]->qm, struct hisi_zip, qm); in hisi_zip_ctx_init()
312 dev = &tmp->qp->qm->pdev->dev; in hisi_zip_create_sgl_pool()
325 hisi_acc_free_sgl_pool(&ctx->qp_ctx[HZIP_QPC_COMP].qp->qm->pdev->dev, in hisi_zip_create_sgl_pool()
335 hisi_acc_free_sgl_pool(&ctx->qp_ctx[i].qp->qm->pdev->dev, in hisi_zip_release_sgl_pool()
358 struct device *dev = &qp->qm->pdev->dev; in hisi_zip_acomp_cb()
407 dev = &ctx->qp_ctx[0].qp->qm->pdev->dev; in hisi_zip_acomp_init()
500 dev_dbg(&qp_ctx->qp->qm->pdev->dev, "req cache is full!\n"); in hisi_zip_create_req()
527 struct device *dev = &qp->qm->pdev->dev; in hisi_zip_do_work()
585 struct device *dev = &qp_ctx->qp->qm->pdev->dev; in hisi_zip_acompress()
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/OK3568_Linux_fs/kernel/drivers/crypto/hisilicon/hpre/
H A Dhpre_main.c71 #define HPRE_ADDR(qm, offset) ((qm)->io_base + (offset)) argument
217 static int hpre_cfg_by_dsm(struct hisi_qm *qm) in hpre_cfg_by_dsm() argument
219 struct device *dev = &qm->pdev->dev; in hpre_cfg_by_dsm()
246 static void disable_flr_of_bme(struct hisi_qm *qm) in disable_flr_of_bme() argument
250 val = readl(HPRE_ADDR(qm, QM_PEH_AXUSER_CFG)); in disable_flr_of_bme()
253 writel(val, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG)); in disable_flr_of_bme()
254 writel(PEH_AXUSER_CFG_ENABLE, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG_ENABLE)); in disable_flr_of_bme()
257 static int hpre_set_user_domain_and_cache(struct hisi_qm *qm) in hpre_set_user_domain_and_cache() argument
259 struct device *dev = &qm->pdev->dev; in hpre_set_user_domain_and_cache()
264 writel(HPRE_QM_USR_CFG_MASK, HPRE_ADDR(qm, QM_ARUSER_M_CFG_ENABLE)); in hpre_set_user_domain_and_cache()
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/OK3568_Linux_fs/yocto/meta-qt5/recipes-qt/qt5/
H A Dqttranslations_git.bb13 … for transfile in `find ${D}/${OE_QMAKE_PATH_TRANSLATIONS} -name qt_*.qm ! -name qt_help_*.qm`; do
38 ${OE_QMAKE_PATH_TRANSLATIONS}/assistant_*.qm \
42 ${OE_QMAKE_PATH_TRANSLATIONS}/designer_*.qm \
46 ${OE_QMAKE_PATH_TRANSLATIONS}/linguist_*.qm \
50 ${OE_QMAKE_PATH_TRANSLATIONS}/qtconnectivity_*.qm \
54 ${OE_QMAKE_PATH_TRANSLATIONS}/qtmultimedia_*.qm \
58 ${OE_QMAKE_PATH_TRANSLATIONS}/qtlocation_*.qm \
62 ${OE_QMAKE_PATH_TRANSLATIONS}/qtdeclarative_*.qm \
66 ${OE_QMAKE_PATH_TRANSLATIONS}/qtquickcontrols_*.qm \
70 ${OE_QMAKE_PATH_TRANSLATIONS}/qtquickcontrols2_*.qm \
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/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Ddebugfs-hisi-zip26 has a QM. Select the QM which below qm refers to.
29 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/regs
36 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/current_q
43 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/clear_enable
52 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/err_irq
59 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/aeq_irq
65 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/abnormal_irq
71 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/create_qp_err
77 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/mb_err
83 What: /sys/kernel/debug/hisi_zip/<bdf>/qm/status
H A Ddebugfs-hisi-sec14 qm refers to.
17 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/qm_regs
24 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/current_q
31 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/clear_enable
39 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/err_irq
46 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/aeq_irq
52 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/abnormal_irq
58 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/create_qp_err
64 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/mb_err
70 What: /sys/kernel/debug/hisi_sec2/<bdf>/qm/status
H A Ddebugfs-hisi-hpre27 has a QM. Select the QM which below qm refers to.
36 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/regs
43 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/current_q
50 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/clear_enable
59 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/err_irq
66 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/aeq_irq
72 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/abnormal_irq
78 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/create_qp_err
84 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/mb_err
90 What: /sys/kernel/debug/hisi_hpre/<bdf>/qm/status
/OK3568_Linux_fs/app/forlinx/flapp/src/plugins/allwinner/video/
H A Dfont.qrc4 <file>fonts/filemanager_zh.qm</file>
6 <file>fonts/qfile_zh.qm</file>
8 <file>fonts/qt_zh_CN.qm</file>
/OK3568_Linux_fs/app/forlinx/flapp/src/plugins/allwinner/music/
H A Dfont.qrc4 <file>fonts/filemanager_zh.qm</file>
6 <file>fonts/qfile_zh.qm</file>
8 <file>fonts/qt_zh_CN.qm</file>
/OK3568_Linux_fs/app/forlinx/flapp/src/plugins/allwinner/MediaUI/
H A Dfont.qrc4 <file>fonts/filemanager_zh.qm</file>
6 <file>fonts/qfile_zh.qm</file>
8 <file>fonts/qt_zh_CN.qm</file>
/OK3568_Linux_fs/external/mpp/mpp/codec/dec/h265/
H A Dh265d_parser2_syntax.c261 static void fill_scaling_lists(const HEVCContext *h, DXVA_Qmatrix_HEVC *qm) in fill_scaling_lists() argument
271 memset(qm, 0, sizeof(DXVA_Qmatrix_HEVC)); in fill_scaling_lists()
275 qm->ucScalingLists0[i][j] = sl->sl[0][i][pos]; in fill_scaling_lists()
280 qm->ucScalingLists1[i][j] = sl->sl[1][i][pos]; in fill_scaling_lists()
281 qm->ucScalingLists2[i][j] = sl->sl[2][i][pos]; in fill_scaling_lists()
284 qm->ucScalingLists3[i][j] = sl->sl[3][i * 3][pos]; in fill_scaling_lists()
287 qm->ucScalingListDCCoefSizeID2[i] = sl->sl_dc[0][i]; in fill_scaling_lists()
290 qm->ucScalingListDCCoefSizeID3[i] = sl->sl_dc[1][i * 3]; in fill_scaling_lists()
320 fill_scaling_lists(h, &ctx_pic->qm); in h265d_parser2_syntax()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/mpg4d/
H A Dhal_m4vd_vdpu1.c40 DXVA_QmatrixData *qm = NULL; in vdpu1_mpg4d_setup_regs_by_syntax() local
53 qm = (DXVA_QmatrixData *)desc->pvPVPState; in vdpu1_mpg4d_setup_regs_by_syntax()
67 mpp_assert(qm); in vdpu1_mpg4d_setup_regs_by_syntax()
74 RK_U8 *src = (qm->bNewQmatrix[0]) ? (qm->Qmatrix[0]) : (default_intra_matrix); in vdpu1_mpg4d_setup_regs_by_syntax()
79 src = (qm->bNewQmatrix[1]) ? (qm->Qmatrix[1]) : (default_inter_matrix); in vdpu1_mpg4d_setup_regs_by_syntax()
H A Dhal_m4vd_vdpu2.c40 DXVA_QmatrixData *qm = NULL; in vdpu2_mpg4d_setup_regs_by_syntax() local
53 qm = (DXVA_QmatrixData *)desc->pvPVPState; in vdpu2_mpg4d_setup_regs_by_syntax()
67 mpp_assert(qm); in vdpu2_mpg4d_setup_regs_by_syntax()
74 RK_U8 *src = (qm->bNewQmatrix[0]) ? (qm->Qmatrix[0]) : (default_intra_matrix); in vdpu2_mpg4d_setup_regs_by_syntax()
79 src = (qm->bNewQmatrix[1]) ? (qm->Qmatrix[1]) : (default_inter_matrix); in vdpu2_mpg4d_setup_regs_by_syntax()
/OK3568_Linux_fs/external/mpp/mpp/codec/dec/mpg4/
H A Dmpg4d_parser.c998 DXVA_QmatrixData *qm) in mpg4d_fill_quantization_matrices() argument
1002 qm->bNewQmatrix[0] = p->new_qm[0]; in mpg4d_fill_quantization_matrices()
1003 qm->bNewQmatrix[1] = p->new_qm[1]; in mpg4d_fill_quantization_matrices()
1004 qm->bNewQmatrix[2] = 0; in mpg4d_fill_quantization_matrices()
1005 qm->bNewQmatrix[3] = 0; in mpg4d_fill_quantization_matrices()
1010 qm->Qmatrix[0][i] = p->quant_matrices[i]; in mpg4d_fill_quantization_matrices()
1013 memset(qm->Qmatrix[0], 0, sizeof(qm->Qmatrix[0])); in mpg4d_fill_quantization_matrices()
1019 qm->Qmatrix[1][i] = p->quant_matrices[64 + i]; in mpg4d_fill_quantization_matrices()
1022 memset(qm->Qmatrix[1], 0, sizeof(qm->Qmatrix[1])); in mpg4d_fill_quantization_matrices()
1025 memset(qm->Qmatrix[2], 0, sizeof(qm->Qmatrix[2])); in mpg4d_fill_quantization_matrices()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/docs/
H A Dpolicy_operation_diagram.dot28 low_queue [ shape=record label = "LowP | {<ql>ctx_lo | ... | <qm>ctx_i | ... | <qr>ctx_hi}" ];
31 rt_queue [ shape=record label = "RT | {<ql>ctx_lo | ... | <qm>ctx_j | ... | <qr>ctx_hi}" ];
97 …call_ctxfinish:sw->rt_queue:qm [ lhead=cluster_policy_queues label="enqueue_ctx()\n/* ctx still ha…
/OK3568_Linux_fs/external/mpp/mpp/codec/dec/h264/
H A Dh264d_fill.c76 void fill_scanlist(H264dVideoCtx_t *p_Vid, DXVA_Qmatrix_H264 *qm) in fill_scanlist() argument
80 memset(qm, 0, sizeof(DXVA_Qmatrix_H264)); in fill_scanlist()
83 qm->bScalingLists4x4[i][j] = p_Vid->qmatrix[i][j]; in fill_scanlist()
88 qm->bScalingLists8x8[i - 6][j] = p_Vid->qmatrix[i][j]; in fill_scanlist()
370 p_dec->pvPVPState = (void *)&dxva_ctx->qm; in commit_buffer()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_com.c702 if (memcmp((void*)&dxva_cxt->qm, reg_ctx->scaling_qm, sizeof(DXVA_Qmatrix_HEVC))) { in hal_h265d_output_scalinglist_packet()
707 sl.sl[0][i][pos] = dxva_cxt->qm.ucScalingLists0[i][j]; in hal_h265d_output_scalinglist_packet()
712 sl.sl[1][i][pos] = dxva_cxt->qm.ucScalingLists1[i][j]; in hal_h265d_output_scalinglist_packet()
713 sl.sl[2][i][pos] = dxva_cxt->qm.ucScalingLists2[i][j]; in hal_h265d_output_scalinglist_packet()
716 sl.sl[3][i][pos] = dxva_cxt->qm.ucScalingLists3[i][j]; in hal_h265d_output_scalinglist_packet()
719 sl.sl_dc[0][i] = dxva_cxt->qm.ucScalingListDCCoefSizeID2[i]; in hal_h265d_output_scalinglist_packet()
721 sl.sl_dc[1][i] = dxva_cxt->qm.ucScalingListDCCoefSizeID3[i]; in hal_h265d_output_scalinglist_packet()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu1.c657 temp = (p_hal->qm->bScalingLists4x4[i][4 * j + 0] << 24) | in vdpu1_set_asic_regs()
658 (p_hal->qm->bScalingLists4x4[i][4 * j + 1] << 16) | in vdpu1_set_asic_regs()
659 (p_hal->qm->bScalingLists4x4[i][4 * j + 2] << 8) | in vdpu1_set_asic_regs()
660 (p_hal->qm->bScalingLists4x4[i][4 * j + 3]); in vdpu1_set_asic_regs()
667 temp = (p_hal->qm->bScalingLists8x8[i][4 * j + 0] << 24) | in vdpu1_set_asic_regs()
668 (p_hal->qm->bScalingLists8x8[i][4 * j + 1] << 16) | in vdpu1_set_asic_regs()
669 (p_hal->qm->bScalingLists8x8[i][4 * j + 2] << 8) | in vdpu1_set_asic_regs()
670 (p_hal->qm->bScalingLists8x8[i][4 * j + 3]); in vdpu1_set_asic_regs()
H A Dhal_h264d_vdpu2.c766 temp = (p_hal->qm->bScalingLists4x4[i][4 * j + 0] << 24) | in set_asic_regs()
767 (p_hal->qm->bScalingLists4x4[i][4 * j + 1] << 16) | in set_asic_regs()
768 (p_hal->qm->bScalingLists4x4[i][4 * j + 2] << 8) | in set_asic_regs()
769 (p_hal->qm->bScalingLists4x4[i][4 * j + 3]); in set_asic_regs()
775 temp = (p_hal->qm->bScalingLists8x8[i][4 * j + 0] << 24) | in set_asic_regs()
776 (p_hal->qm->bScalingLists8x8[i][4 * j + 1] << 16) | in set_asic_regs()
777 (p_hal->qm->bScalingLists8x8[i][4 * j + 2] << 8) | in set_asic_regs()
778 (p_hal->qm->bScalingLists8x8[i][4 * j + 3]); in set_asic_regs()
/OK3568_Linux_fs/app/forlinx/flapp/src/plugins/allwinner/camera/CameraUI/image/
H A Dfont.qrc4 <file>qt_zh_CN.qm</file>

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