Home
last modified time | relevance | path

Searched refs:pllm (Results 1 – 11 of 11) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-davinci/
H A Dcpu.c58 int pllm; in clk_get() local
81 pllm = readl(pll_base + PLLC_PLLM) + 1; in clk_get()
84 pll_out *= pllm; in clk_get()
H A Ddm365_lowlevel.c57 writel(pllmult, &dv_pll0_regs->pllm); in dm365_pll1_init()
103 int dm365_pll2_init(unsigned long pllm, unsigned long prediv) in dm365_pll2_init() argument
139 writel(pllm, &dv_pll1_regs->pllm); in dm365_pll2_init()
H A Dda850_lowlevel.c90 writel(pllmult, &reg->pllm); in da850_pll_init()
/OK3568_Linux_fs/kernel/drivers/clk/keystone/
H A Dpll.c51 void __iomem *pllm; member
88 val = readl(pll_data->pllm); in clk_pllclk_recalc()
203 pll_data->pllm = of_iomap(node, i); in _of_pll_clk_init()
204 if (!pll_data->pllm) { in _of_pll_clk_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/
H A Dclock.c63 u32 pllm, plld, bwadj; in configure_mult_div() local
65 pllm = data->pll_m - 1; in configure_mult_div()
70 pllctl_reg_write(data->pll, mult, pllm & PLLM_MULT_LO_MASK); in configure_mult_div()
74 pllm << CFG_PLLCTL0_PLLM_SHIFT); in configure_mult_div()
/OK3568_Linux_fs/u-boot/arch/arm/mach-stm32/stm32f4/
H A Dclock.c204 u16 pllm, plln, pllp; in clock_get() local
205 pllm = (readl(&STM32_RCC->pllcfgr) & RCC_PLLCFGR_PLLM_MASK); in clock_get()
210 sysclk = ((CONFIG_STM32_HSE_HZ / pllm) * plln) / pllp; in clock_get()
/OK3568_Linux_fs/u-boot/drivers/clk/
H A Dclk_stm32f7.c190 u16 pllm, plln, pllp; in stm32_clk_get_rate() local
191 pllm = (readl(&regs->pllcfgr) & RCC_PLLCFGR_PLLM_MASK); in stm32_clk_get_rate()
196 sysclk = ((CONFIG_STM32_HSE_HZ / pllm) * plln) / pllp; in stm32_clk_get_rate()
/OK3568_Linux_fs/u-boot/arch/arm/mach-davinci/include/mach/
H A Ddm365_lowlevel.h18 int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
H A Dpll_defs.h19 unsigned int pllm; /* 0x110 */ member
H A Dhardware.h401 dv_reg pllm; member
/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-stm32f4.c1690 unsigned long pllm; in stm32f4_rcc_init() local
1745 pllm = readl(base + STM32F4_RCC_PLLCFGR) & 0x3f; in stm32f4_rcc_init()
1748 0, 1, pllm); in stm32f4_rcc_init()