Searched refs:nandc_readl (Results 1 – 6 of 6) sorted by relevance
43 if (nandc_readl(NANDC_V9_NANDC_VER) == RK3326_NANDC_VER) in nandc_init()73 tmp.d32 = nandc_readl(NANDC_FMCTL); in nandc_flash_cs()82 tmp.d32 = nandc_readl(NANDC_FMCTL); in nandc_flash_de_cs()103 tmp.d32 = nandc_readl(NANDC_FMCTL); in nandc_wait_flash_ready()243 master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG); in nandc_xfer_start()257 bch_reg.d32 = nandc_readl(NANDC_BCHCTL); in nandc_xfer_start()269 master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG); in nandc_xfer_start()332 master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG); in nandc_xfer_done()335 fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL); in nandc_xfer_done()336 stat_reg.d32 = nandc_readl(NANDC_V9_MTRANS_STAT); in nandc_xfer_done()[all …]
57 ptr[0] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()58 ptr[1] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()59 ptr[2] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()60 ptr[3] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()61 ptr[4] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()62 ptr[5] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()63 ptr[6] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()64 ptr[7] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()130 return nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_status()147 ecc0 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF; in flash_read_ecc()[all …]
13 #define nandc_readl(offs) readl((offs) + nandc_base) macro
39 if (nandc_readl(NANDC_V9_NANDC_VER) == RK3326_NANDC_VER) in nandc_init()69 tmp.d32 = nandc_readl(NANDC_FMCTL); in nandc_flash_cs()78 tmp.d32 = nandc_readl(NANDC_FMCTL); in nandc_flash_de_cs()99 tmp.d32 = nandc_readl(NANDC_FMCTL); in nandc_wait_flash_ready()235 master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG); in nandc_xfer_start()249 bch_reg.d32 = nandc_readl(NANDC_BCHCTL); in nandc_xfer_start()261 master_reg.d32 = nandc_readl(NANDC_MTRANS_CFG); in nandc_xfer_start()321 master_reg.d32 = nandc_readl(NANDC_V9_MTRANS_CFG); in nandc_xfer_done()324 fl_reg.d32 = nandc_readl(NANDC_V9_FLCTL); in nandc_xfer_done()325 stat_reg.d32 = nandc_readl(NANDC_V9_MTRANS_STAT); in nandc_xfer_done()[all …]
58 ptr[0] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()59 ptr[1] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()60 ptr[2] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()61 ptr[3] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()62 ptr[4] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()63 ptr[5] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()64 ptr[6] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()65 ptr[7] = nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_id_raw()131 return nandc_readl(NANDC_CHIP_DATA(cs)); in flash_read_status()148 ecc0 = nandc_readl(NANDC_CHIP_DATA(cs)) & 0xF; in flash_read_ecc()[all …]
11 #define nandc_readl(offs) readl((offs) + nandc_base) macro