Searched refs:max_limits (Results 1 – 12 of 12) sorted by relevance
1270 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument1283 max_limits->sclk, in btc_adjust_clock_combinations()1290 max_limits->mclk, in btc_adjust_clock_combinations()2099 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local2111 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()2113 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()2116 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()2117 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()2118 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()2119 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()[all …]
790 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local803 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()805 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()809 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()810 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()811 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()812 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()813 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()814 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()815 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()[all …]
48 const struct radeon_clock_and_voltage_limits *max_limits,
785 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local810 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()812 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()816 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()817 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()818 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()819 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()3919 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local3923 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()3925 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2953 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3010 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3012 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3020 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3021 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3022 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3023 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()3024 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()3025 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()3026 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()[all …]
2151 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2162 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2166 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2285 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2287 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
3244 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local3260 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()3268 max_limits->mclk) in vega10_apply_state_adjust_rules()3270 max_limits->mclk; in vega10_apply_state_adjust_rules()3272 max_limits->sclk) in vega10_apply_state_adjust_rules()3274 max_limits->sclk; in vega10_apply_state_adjust_rules()3291 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()3292 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()3308 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()3333 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()[all …]
2993 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local3008 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()3015 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()3016 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()3017 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()3018 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()3027 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()3028 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()3043 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()3070 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()[all …]
1801 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()1804 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()1805 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
2794 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()2797 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()2798 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()
3268 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument3281 max_limits->sclk, in btc_adjust_clock_combinations()3288 max_limits->mclk, in btc_adjust_clock_combinations()3411 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3465 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3467 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3475 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3476 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3477 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3478 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()[all …]
2205 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2216 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2220 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2339 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2341 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()