1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2011 Advanced Micro Devices, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 12*4882a593Smuzhiyun * all copies or substantial portions of the Software. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun #ifndef __BTC_DPM_H__ 24*4882a593Smuzhiyun #define __BTC_DPM_H__ 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #include "radeon.h" 27*4882a593Smuzhiyun #include "rv770_dpm.h" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define BTC_RLP_UVD_DFLT 20 30*4882a593Smuzhiyun #define BTC_RMP_UVD_DFLT 50 31*4882a593Smuzhiyun #define BTC_LHP_UVD_DFLT 50 32*4882a593Smuzhiyun #define BTC_LMP_UVD_DFLT 20 33*4882a593Smuzhiyun #define BARTS_MGCGCGTSSMCTRL_DFLT 0x81944000 34*4882a593Smuzhiyun #define TURKS_MGCGCGTSSMCTRL_DFLT 0x6e944000 35*4882a593Smuzhiyun #define CAICOS_MGCGCGTSSMCTRL_DFLT 0x46944040 36*4882a593Smuzhiyun #define BTC_CGULVPARAMETER_DFLT 0x00040035 37*4882a593Smuzhiyun #define BTC_CGULVCONTROL_DFLT 0x00001450 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun extern u32 btc_valid_sclk[40]; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun void btc_read_arb_registers(struct radeon_device *rdev); 42*4882a593Smuzhiyun void btc_program_mgcg_hw_sequence(struct radeon_device *rdev, 43*4882a593Smuzhiyun const u32 *sequence, u32 count); 44*4882a593Smuzhiyun void btc_skip_blacklist_clocks(struct radeon_device *rdev, 45*4882a593Smuzhiyun const u32 max_sclk, const u32 max_mclk, 46*4882a593Smuzhiyun u32 *sclk, u32 *mclk); 47*4882a593Smuzhiyun void btc_adjust_clock_combinations(struct radeon_device *rdev, 48*4882a593Smuzhiyun const struct radeon_clock_and_voltage_limits *max_limits, 49*4882a593Smuzhiyun struct rv7xx_pl *pl); 50*4882a593Smuzhiyun void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table, 51*4882a593Smuzhiyun u32 clock, u16 max_voltage, u16 *voltage); 52*4882a593Smuzhiyun void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table, 53*4882a593Smuzhiyun u32 *max_clock); 54*4882a593Smuzhiyun void btc_apply_voltage_delta_rules(struct radeon_device *rdev, 55*4882a593Smuzhiyun u16 max_vddc, u16 max_vddci, 56*4882a593Smuzhiyun u16 *vddc, u16 *vddci); 57*4882a593Smuzhiyun bool btc_dpm_enabled(struct radeon_device *rdev); 58*4882a593Smuzhiyun int btc_reset_to_default(struct radeon_device *rdev); 59*4882a593Smuzhiyun void btc_notify_uvd_to_smc(struct radeon_device *rdev, 60*4882a593Smuzhiyun struct radeon_ps *radeon_new_state); 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #endif 63