Searched refs:lcd0_ch1_clk_cfg (Results 1 – 3 of 3) sorted by relevance
76 u32 lcd0_ch1_clk_cfg; /* 0x12c */ member
89 u32 lcd0_ch1_clk_cfg; /* 0x12c LCD0 CH1 module clock */ member
621 CCM_LCD_CH1_CTRL_M(best_m), &ccm->lcd0_ch1_clk_cfg); in sunxi_lcdc_pll_set()623 setbits_le32(&ccm->lcd0_ch1_clk_cfg, in sunxi_lcdc_pll_set()