Searched refs:interface_params (Results 1 – 8 of 8) sorted by relevance
214 data = (tm->interface_params[if_id].bus_width == in ddr3_tip_configure_cs()220 mem_index = tm->interface_params[if_id].memory_size; in ddr3_tip_configure_cs()275 cs_bitmask = tm->interface_params[if_id]. in calc_cs_num()339 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()351 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()354 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()358 (tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()444 (tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()464 (tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()473 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()[all …]
336 freq = tm->interface_params[first_active_if].memory_freq; in ddr3_tip_print_log()1103 *ptr = (u32 *)&(tm->interface_params in ddr3_tip_access_atr()1107 *ptr = (u32 *)&(tm->interface_params in ddr3_tip_access_atr()1111 *ptr = (u32 *)&(tm->interface_params in ddr3_tip_access_atr()1115 *ptr = (u32 *)&(tm->interface_params in ddr3_tip_access_atr()1119 *ptr = (u32 *)&(tm->interface_params in ddr3_tip_access_atr()1123 *ptr = (u32 *)&(tm->interface_params in ddr3_tip_access_atr()1128 *ptr = (u32 *)&(tm->interface_params[if_id]. in ddr3_tip_access_atr()1133 *ptr = (u32 *)&(tm->interface_params[if_id]. in ddr3_tip_access_atr()1138 *ptr = (u32 *)&(tm->interface_params[if_id]. in ddr3_tip_access_atr()[all …]
237 if (tm->interface_params[first_active_if].memory_freq == in ddr3_tip_read_leveling_static_config()239 cl_value = tm->interface_params[first_active_if].cas_l; in ddr3_tip_read_leveling_static_config()243 speed_bin_index = tm->interface_params[if_id].speed_bin_index; in ddr3_tip_read_leveling_static_config()257 tm->interface_params[if_id].as_bus_params[ in ddr3_tip_read_leveling_static_config()
103 struct if_params interface_params[MAX_INTERFACE_NUM]; member
50 interface_params[0].as_bus_params[0]. in hws_ddr3_tip_max_cs_get()219 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_dynamic_read_leveling()618 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_dynamic_per_bit_read_leveling()938 all_bus_cs |= tm->interface_params[if_id]. in ddr3_tip_calc_cs_mask()940 same_bus_cs &= tm->interface_params[if_id]. in ddr3_tip_calc_cs_mask()944 *cs_mask &= ~tm->interface_params[if_id]. in ddr3_tip_calc_cs_mask()
441 init_freq = tm->interface_params[first_active_if].memory_freq; in ddr3_tip_init_a38x_silicon()454 tm->interface_params[if_id].memory_freq = freq; in ddr3_a38x_update_topology_map()
232 cs_ena = tm->interface_params[0].as_bus_params[0].cs_bitmask; in ddr3_save_and_set_training_windows()606 [tm->interface_params[0].memory_size]; in ddr3_fast_path_dynamic_cs_size_config()
660 if (tm->interface_params[if_id].bus_width == in ddr3_tip_cmd_addr_init_delay()