Searched refs:div_fsys3 (Results 1 – 5 of 5) sorted by relevance
71 writel(CLK_DIV_FSYS3_VAL, &clk->div_fsys3); in system_clock_init()
816 ratio = readl(&clk->div_fsys3); in exynos4_get_mmc_clk()817 pre_ratio = readl(&clk->div_fsys3); in exynos4_get_mmc_clk()853 addr = (unsigned int)&clk->div_fsys3; in exynos4_set_mmc_clk()
98 unsigned int div_fsys3; member335 unsigned int div_fsys3; member
352 clrsetbits_le32(&clk->div_fsys3, clr, set); in board_clock_init()
334 writel(CLK_DIV_FSYS3_VAL, (unsigned int)&clk->div_fsys3); in board_clock_init()