| /OK3568_Linux_fs/kernel/drivers/crypto/qat/qat_common/ |
| H A D | adf_hw_arbiter.c | 18 #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ argument 19 ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \ 22 #define WRITE_CSR_ARB_SARCONFIG(csr_addr, index, value) \ argument 23 ADF_CSR_WR(csr_addr, ADF_ARB_OFFSET + \ 26 #define WRITE_CSR_ARB_WRK_2_SER_MAP(csr_addr, index, value) \ argument 27 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ 31 #define WRITE_CSR_ARB_WQCFG(csr_addr, index, value) \ argument 32 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \ 38 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb() 67 WRITE_CSR_ARB_RINGSRVARBEN(ring->bank->csr_addr, in adf_update_ring_arb() [all …]
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| H A D | adf_transport.c | 60 WRITE_CSR_INT_COL_EN(bank->csr_addr, bank->bank_number, bank->irq_mask); in adf_enable_ring_irq() 61 WRITE_CSR_INT_COL_CTL(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq() 70 WRITE_CSR_INT_COL_EN(bank->csr_addr, bank->bank_number, bank->irq_mask); in adf_disable_ring_irq() 87 WRITE_CSR_RING_TAIL(ring->bank->csr_addr, ring->bank->bank_number, in adf_send_message() 109 WRITE_CSR_RING_HEAD(ring->bank->csr_addr, in adf_handle_response() 119 WRITE_CSR_RING_CONFIG(ring->bank->csr_addr, ring->bank->bank_number, in adf_configure_tx_ring() 130 WRITE_CSR_RING_CONFIG(ring->bank->csr_addr, ring->bank->bank_number, in adf_configure_rx_ring() 167 WRITE_CSR_RING_BASE(ring->bank->csr_addr, ring->bank->bank_number, in adf_init_ring() 277 WRITE_CSR_RING_CONFIG(bank->csr_addr, bank->bank_number, in adf_remove_ring() 279 WRITE_CSR_RING_BASE(bank->csr_addr, bank->bank_number, in adf_remove_ring() [all …]
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| H A D | adf_transport_debug.c | 45 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show() 148 void __iomem *csr = bank->csr_addr; in adf_bank_show()
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| H A D | adf_transport_internal.h | 33 void __iomem *csr_addr; member
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| H A D | qat_hal.c | 410 void __iomem *csr_addr = in qat_hal_init_esram() local 419 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram() 423 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram() 425 ADF_CSR_WR(csr_addr, 0, csr_val); in qat_hal_init_esram() 429 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
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| H A D | adf_vf_isr.c | 190 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, in adf_isr()
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| H A D | adf_isr.c | 56 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, 0); in adf_msix_isr_bundle()
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/octeon/ |
| H A D | cvmx.h | 266 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() argument 268 cvmx_write64(csr_addr, val); in cvmx_write_csr() 276 if (((csr_addr >> 40) & 0x7ffff) == (0x118)) in cvmx_write_csr() 280 static inline void cvmx_writeq_csr(void __iomem *csr_addr, uint64_t val) in cvmx_writeq_csr() argument 282 cvmx_write_csr((__force uint64_t)csr_addr, val); in cvmx_writeq_csr() 291 static inline uint64_t cvmx_read_csr(uint64_t csr_addr) in cvmx_read_csr() argument 293 uint64_t val = cvmx_read64(csr_addr); in cvmx_read_csr() 297 static inline uint64_t cvmx_readq_csr(void __iomem *csr_addr) in cvmx_readq_csr() argument 299 return cvmx_read_csr((__force uint64_t) csr_addr); in cvmx_readq_csr() 308 static inline void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr) in cvmx_read_csr_async() argument [all …]
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| H A D | octeon-model.h | 314 static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/huawei/hinic/ |
| H A D | hinic_hw_dev.h | 477 u32 csr_addr; member
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| H A D | hinic_devlink.c | 448 err = devlink_fmsg_u32_pair_put(fmsg, "csr_addr", event->event.phy_fault.csr_addr); in fault_report_show()
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| /OK3568_Linux_fs/kernel/drivers/staging/octeon/ |
| H A D | octeon-stubs.h | 1233 static inline uint64_t cvmx_read_csr(uint64_t csr_addr) in cvmx_read_csr() argument 1238 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() argument
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