1*4882a593Smuzhiyun /***********************license start***************
2*4882a593Smuzhiyun * Author: Cavium Networks
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Contact: support@caviumnetworks.com
5*4882a593Smuzhiyun * This file is part of the OCTEON SDK
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2003-2010 Cavium Networks
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun * it under the terms of the GNU General Public License, Version 2, as
11*4882a593Smuzhiyun * published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*4882a593Smuzhiyun * NONINFRINGEMENT. See the GNU General Public License for more
17*4882a593Smuzhiyun * details.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun * along with this file; if not, write to the Free Software
21*4882a593Smuzhiyun * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22*4882a593Smuzhiyun * or visit http://www.gnu.org/licenses/.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * This file may also be available under a different license from Cavium.
25*4882a593Smuzhiyun * Contact Cavium Networks for more information
26*4882a593Smuzhiyun ***********************license end**************************************/
27*4882a593Smuzhiyun #ifndef __OCTEON_MODEL_H__
28*4882a593Smuzhiyun #define __OCTEON_MODEL_H__
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /*
31*4882a593Smuzhiyun * The defines below should be used with the OCTEON_IS_MODEL() macro
32*4882a593Smuzhiyun * to determine what model of chip the software is running on. Models
33*4882a593Smuzhiyun * ending in 'XX' match multiple models (families), while specific
34*4882a593Smuzhiyun * models match only that model. If a pass (revision) is specified,
35*4882a593Smuzhiyun * then only that revision will be matched. Care should be taken when
36*4882a593Smuzhiyun * checking for both specific models and families that the specific
37*4882a593Smuzhiyun * models are checked for first. While these defines are similar to
38*4882a593Smuzhiyun * the processor ID, they are not intended to be used by anything
39*4882a593Smuzhiyun * other that the OCTEON_IS_MODEL framework, and the values are
40*4882a593Smuzhiyun * subject to change at anytime without notice.
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * NOTE: only the OCTEON_IS_MODEL() macro/function and the OCTEON_CN*
43*4882a593Smuzhiyun * macros should be used outside of this file. All other macros are
44*4882a593Smuzhiyun * for internal use only, and may change without notice.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define OCTEON_FAMILY_MASK 0x00ffff00
48*4882a593Smuzhiyun #define OCTEON_PRID_MASK 0x00ffffff
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* Flag bits in top byte */
51*4882a593Smuzhiyun /* Ignores revision in model checks */
52*4882a593Smuzhiyun #define OM_IGNORE_REVISION 0x01000000
53*4882a593Smuzhiyun /* Check submodels */
54*4882a593Smuzhiyun #define OM_CHECK_SUBMODEL 0x02000000
55*4882a593Smuzhiyun /* Match all models previous than the one specified */
56*4882a593Smuzhiyun #define OM_MATCH_PREVIOUS_MODELS 0x04000000
57*4882a593Smuzhiyun /* Ignores the minor revison on newer parts */
58*4882a593Smuzhiyun #define OM_IGNORE_MINOR_REVISION 0x08000000
59*4882a593Smuzhiyun #define OM_FLAG_MASK 0xff000000
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Match all cn5XXX Octeon models. */
62*4882a593Smuzhiyun #define OM_MATCH_5XXX_FAMILY_MODELS 0x20000000
63*4882a593Smuzhiyun /* Match all cn6XXX Octeon models. */
64*4882a593Smuzhiyun #define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
65*4882a593Smuzhiyun /* Match all cnf7XXX Octeon models. */
66*4882a593Smuzhiyun #define OM_MATCH_F7XXX_FAMILY_MODELS 0x80000000
67*4882a593Smuzhiyun /* Match all cn7XXX Octeon models. */
68*4882a593Smuzhiyun #define OM_MATCH_7XXX_FAMILY_MODELS 0x10000000
69*4882a593Smuzhiyun #define OM_MATCH_FAMILY_MODELS (OM_MATCH_5XXX_FAMILY_MODELS | \
70*4882a593Smuzhiyun OM_MATCH_6XXX_FAMILY_MODELS | \
71*4882a593Smuzhiyun OM_MATCH_F7XXX_FAMILY_MODELS | \
72*4882a593Smuzhiyun OM_MATCH_7XXX_FAMILY_MODELS)
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun * CN7XXX models with new revision encoding
75*4882a593Smuzhiyun */
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun #define OCTEON_CNF75XX_PASS1_0 0x000d9800
78*4882a593Smuzhiyun #define OCTEON_CNF75XX (OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_REVISION)
79*4882a593Smuzhiyun #define OCTEON_CNF75XX_PASS1_X (OCTEON_CNF75XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define OCTEON_CN73XX_PASS1_0 0x000d9700
82*4882a593Smuzhiyun #define OCTEON_CN73XX_PASS1_1 0x000d9701
83*4882a593Smuzhiyun #define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
84*4882a593Smuzhiyun #define OCTEON_CN73XX_PASS1_X (OCTEON_CN73XX_PASS1_0 | \
85*4882a593Smuzhiyun OM_IGNORE_MINOR_REVISION)
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun #define OCTEON_CN70XX_PASS1_0 0x000d9600
88*4882a593Smuzhiyun #define OCTEON_CN70XX_PASS1_1 0x000d9601
89*4882a593Smuzhiyun #define OCTEON_CN70XX_PASS1_2 0x000d9602
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun #define OCTEON_CN70XX_PASS2_0 0x000d9608
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun #define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
94*4882a593Smuzhiyun #define OCTEON_CN70XX_PASS1_X (OCTEON_CN70XX_PASS1_0 | \
95*4882a593Smuzhiyun OM_IGNORE_MINOR_REVISION)
96*4882a593Smuzhiyun #define OCTEON_CN70XX_PASS2_X (OCTEON_CN70XX_PASS2_0 | \
97*4882a593Smuzhiyun OM_IGNORE_MINOR_REVISION)
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #define OCTEON_CN71XX OCTEON_CN70XX
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun #define OCTEON_CN78XX_PASS1_0 0x000d9500
102*4882a593Smuzhiyun #define OCTEON_CN78XX_PASS1_1 0x000d9501
103*4882a593Smuzhiyun #define OCTEON_CN78XX_PASS2_0 0x000d9508
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun #define OCTEON_CN78XX (OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION)
106*4882a593Smuzhiyun #define OCTEON_CN78XX_PASS1_X (OCTEON_CN78XX_PASS1_0 | \
107*4882a593Smuzhiyun OM_IGNORE_MINOR_REVISION)
108*4882a593Smuzhiyun #define OCTEON_CN78XX_PASS2_X (OCTEON_CN78XX_PASS2_0 | \
109*4882a593Smuzhiyun OM_IGNORE_MINOR_REVISION)
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun #define OCTEON_CN76XX (0x000d9540 | OM_CHECK_SUBMODEL)
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /*
114*4882a593Smuzhiyun * CNF7XXX models with new revision encoding
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun #define OCTEON_CNF71XX_PASS1_0 0x000d9400
117*4882a593Smuzhiyun #define OCTEON_CNF71XX_PASS1_1 0x000d9401
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun #define OCTEON_CNF71XX (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION)
120*4882a593Smuzhiyun #define OCTEON_CNF71XX_PASS1_X (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /*
123*4882a593Smuzhiyun * CN6XXX models with new revision encoding
124*4882a593Smuzhiyun */
125*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS1_0 0x000d9100
126*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS1_1 0x000d9101
127*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS1_2 0x000d9102
128*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS2_0 0x000d9108
129*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS2_1 0x000d9109
130*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS2_2 0x000d910a
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
133*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS1_X (OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
134*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS2_X (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS1 OCTEON_CN68XX_PASS1_X
137*4882a593Smuzhiyun #define OCTEON_CN68XX_PASS2 OCTEON_CN68XX_PASS2_X
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun #define OCTEON_CN66XX_PASS1_0 0x000d9200
140*4882a593Smuzhiyun #define OCTEON_CN66XX_PASS1_2 0x000d9202
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun #define OCTEON_CN66XX (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_REVISION)
143*4882a593Smuzhiyun #define OCTEON_CN66XX_PASS1_X (OCTEON_CN66XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS1_0 0x000d9000
146*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS1_1 0x000d9001
147*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS1_2 0x000d9002
148*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS2_0 0x000d9008
149*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS2_1 0x000d9009
150*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS2_2 0x000d900a
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun #define OCTEON_CN63XX (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_REVISION)
153*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
154*4882a593Smuzhiyun #define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* CN62XX is same as CN63XX with 1 MB cache */
157*4882a593Smuzhiyun #define OCTEON_CN62XX OCTEON_CN63XX
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun #define OCTEON_CN61XX_PASS1_0 0x000d9300
160*4882a593Smuzhiyun #define OCTEON_CN61XX_PASS1_1 0x000d9301
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun #define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
163*4882a593Smuzhiyun #define OCTEON_CN61XX_PASS1_X (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* CN60XX is same as CN61XX with 512 KB cache */
166*4882a593Smuzhiyun #define OCTEON_CN60XX OCTEON_CN61XX
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /*
169*4882a593Smuzhiyun * CN5XXX models with new revision encoding
170*4882a593Smuzhiyun */
171*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS1_0 0x000d0300
172*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS1_1 0x000d0301
173*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS1_2 0x000d0303
174*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS2_0 0x000d0308
175*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS2_1 0x000d0309
176*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS2_2 0x000d030a
177*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS2_3 0x000d030b
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun #define OCTEON_CN58XX (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_REVISION)
180*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
181*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
182*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS1 OCTEON_CN58XX_PASS1_X
183*4882a593Smuzhiyun #define OCTEON_CN58XX_PASS2 OCTEON_CN58XX_PASS2_X
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS1_0 0x000d0400
186*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS1_1 0x000d0401
187*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS2_0 0x000d0408
188*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS2_1 0x000d0409
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun #define OCTEON_CN56XX (OCTEON_CN56XX_PASS2_0 | OM_IGNORE_REVISION)
191*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS1_X (OCTEON_CN56XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
192*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS2_X (OCTEON_CN56XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
193*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS1 OCTEON_CN56XX_PASS1_X
194*4882a593Smuzhiyun #define OCTEON_CN56XX_PASS2 OCTEON_CN56XX_PASS2_X
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #define OCTEON_CN57XX OCTEON_CN56XX
197*4882a593Smuzhiyun #define OCTEON_CN57XX_PASS1 OCTEON_CN56XX_PASS1
198*4882a593Smuzhiyun #define OCTEON_CN57XX_PASS2 OCTEON_CN56XX_PASS2
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun #define OCTEON_CN55XX OCTEON_CN56XX
201*4882a593Smuzhiyun #define OCTEON_CN55XX_PASS1 OCTEON_CN56XX_PASS1
202*4882a593Smuzhiyun #define OCTEON_CN55XX_PASS2 OCTEON_CN56XX_PASS2
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun #define OCTEON_CN54XX OCTEON_CN56XX
205*4882a593Smuzhiyun #define OCTEON_CN54XX_PASS1 OCTEON_CN56XX_PASS1
206*4882a593Smuzhiyun #define OCTEON_CN54XX_PASS2 OCTEON_CN56XX_PASS2
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun #define OCTEON_CN50XX_PASS1_0 0x000d0600
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun #define OCTEON_CN50XX (OCTEON_CN50XX_PASS1_0 | OM_IGNORE_REVISION)
211*4882a593Smuzhiyun #define OCTEON_CN50XX_PASS1_X (OCTEON_CN50XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
212*4882a593Smuzhiyun #define OCTEON_CN50XX_PASS1 OCTEON_CN50XX_PASS1_X
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /*
215*4882a593Smuzhiyun * NOTE: Octeon CN5000F model is not identifiable using the
216*4882a593Smuzhiyun * OCTEON_IS_MODEL() functions, but are treated as CN50XX.
217*4882a593Smuzhiyun */
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun #define OCTEON_CN52XX_PASS1_0 0x000d0700
220*4882a593Smuzhiyun #define OCTEON_CN52XX_PASS2_0 0x000d0708
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun #define OCTEON_CN52XX (OCTEON_CN52XX_PASS2_0 | OM_IGNORE_REVISION)
223*4882a593Smuzhiyun #define OCTEON_CN52XX_PASS1_X (OCTEON_CN52XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
224*4882a593Smuzhiyun #define OCTEON_CN52XX_PASS2_X (OCTEON_CN52XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
225*4882a593Smuzhiyun #define OCTEON_CN52XX_PASS1 OCTEON_CN52XX_PASS1_X
226*4882a593Smuzhiyun #define OCTEON_CN52XX_PASS2 OCTEON_CN52XX_PASS2_X
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /*
229*4882a593Smuzhiyun * CN3XXX models with old revision enconding
230*4882a593Smuzhiyun */
231*4882a593Smuzhiyun #define OCTEON_CN38XX_PASS1 0x000d0000
232*4882a593Smuzhiyun #define OCTEON_CN38XX_PASS2 0x000d0001
233*4882a593Smuzhiyun #define OCTEON_CN38XX_PASS3 0x000d0003
234*4882a593Smuzhiyun #define OCTEON_CN38XX (OCTEON_CN38XX_PASS3 | OM_IGNORE_REVISION)
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun #define OCTEON_CN36XX OCTEON_CN38XX
237*4882a593Smuzhiyun #define OCTEON_CN36XX_PASS2 OCTEON_CN38XX_PASS2
238*4882a593Smuzhiyun #define OCTEON_CN36XX_PASS3 OCTEON_CN38XX_PASS3
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /* The OCTEON_CN31XX matches CN31XX models and the CN3020 */
241*4882a593Smuzhiyun #define OCTEON_CN31XX_PASS1 0x000d0100
242*4882a593Smuzhiyun #define OCTEON_CN31XX_PASS1_1 0x000d0102
243*4882a593Smuzhiyun #define OCTEON_CN31XX (OCTEON_CN31XX_PASS1 | OM_IGNORE_REVISION)
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun /*
246*4882a593Smuzhiyun * This model is only used for internal checks, it is not a valid
247*4882a593Smuzhiyun * model for the OCTEON_MODEL environment variable. This matches the
248*4882a593Smuzhiyun * CN3010 and CN3005 but NOT the CN3020.
249*4882a593Smuzhiyun */
250*4882a593Smuzhiyun #define OCTEON_CN30XX_PASS1 0x000d0200
251*4882a593Smuzhiyun #define OCTEON_CN30XX_PASS1_1 0x000d0202
252*4882a593Smuzhiyun #define OCTEON_CN30XX (OCTEON_CN30XX_PASS1 | OM_IGNORE_REVISION)
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun #define OCTEON_CN3005_PASS1 (0x000d0210 | OM_CHECK_SUBMODEL)
255*4882a593Smuzhiyun #define OCTEON_CN3005_PASS1_0 (0x000d0210 | OM_CHECK_SUBMODEL)
256*4882a593Smuzhiyun #define OCTEON_CN3005_PASS1_1 (0x000d0212 | OM_CHECK_SUBMODEL)
257*4882a593Smuzhiyun #define OCTEON_CN3005 (OCTEON_CN3005_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun #define OCTEON_CN3010_PASS1 (0x000d0200 | OM_CHECK_SUBMODEL)
260*4882a593Smuzhiyun #define OCTEON_CN3010_PASS1_0 (0x000d0200 | OM_CHECK_SUBMODEL)
261*4882a593Smuzhiyun #define OCTEON_CN3010_PASS1_1 (0x000d0202 | OM_CHECK_SUBMODEL)
262*4882a593Smuzhiyun #define OCTEON_CN3010 (OCTEON_CN3010_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun #define OCTEON_CN3020_PASS1 (0x000d0110 | OM_CHECK_SUBMODEL)
265*4882a593Smuzhiyun #define OCTEON_CN3020_PASS1_0 (0x000d0110 | OM_CHECK_SUBMODEL)
266*4882a593Smuzhiyun #define OCTEON_CN3020_PASS1_1 (0x000d0112 | OM_CHECK_SUBMODEL)
267*4882a593Smuzhiyun #define OCTEON_CN3020 (OCTEON_CN3020_PASS1 | OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /*
270*4882a593Smuzhiyun * This matches the complete family of CN3xxx CPUs, and not subsequent
271*4882a593Smuzhiyun * models
272*4882a593Smuzhiyun */
273*4882a593Smuzhiyun #define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
274*4882a593Smuzhiyun #define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
275*4882a593Smuzhiyun #define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
276*4882a593Smuzhiyun #define OCTEON_CNF7XXX (OCTEON_CNF71XX_PASS1_0 | \
277*4882a593Smuzhiyun OM_MATCH_F7XXX_FAMILY_MODELS)
278*4882a593Smuzhiyun #define OCTEON_CN7XXX (OCTEON_CN78XX_PASS1_0 | \
279*4882a593Smuzhiyun OM_MATCH_7XXX_FAMILY_MODELS)
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /* The revision byte (low byte) has two different encodings.
282*4882a593Smuzhiyun * CN3XXX:
283*4882a593Smuzhiyun *
284*4882a593Smuzhiyun * bits
285*4882a593Smuzhiyun * <7:5>: reserved (0)
286*4882a593Smuzhiyun * <4>: alternate package
287*4882a593Smuzhiyun * <3:0>: revision
288*4882a593Smuzhiyun *
289*4882a593Smuzhiyun * CN5XXX and older models:
290*4882a593Smuzhiyun *
291*4882a593Smuzhiyun * bits
292*4882a593Smuzhiyun * <7>: reserved (0)
293*4882a593Smuzhiyun * <6>: alternate package
294*4882a593Smuzhiyun * <5:3>: major revision
295*4882a593Smuzhiyun * <2:0>: minor revision
296*4882a593Smuzhiyun *
297*4882a593Smuzhiyun */
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* Masks used for the various types of model/family/revision matching */
300*4882a593Smuzhiyun #define OCTEON_38XX_FAMILY_MASK 0x00ffff00
301*4882a593Smuzhiyun #define OCTEON_38XX_FAMILY_REV_MASK 0x00ffff0f
302*4882a593Smuzhiyun #define OCTEON_38XX_MODEL_MASK 0x00ffff10
303*4882a593Smuzhiyun #define OCTEON_38XX_MODEL_REV_MASK (OCTEON_38XX_FAMILY_REV_MASK | OCTEON_38XX_MODEL_MASK)
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun /* CN5XXX and later use different layout of bits in the revision ID field */
306*4882a593Smuzhiyun #define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK
307*4882a593Smuzhiyun #define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f
308*4882a593Smuzhiyun #define OCTEON_58XX_MODEL_MASK 0x00ffff40
309*4882a593Smuzhiyun #define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
310*4882a593Smuzhiyun #define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00ffff38)
311*4882a593Smuzhiyun #define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
314*4882a593Smuzhiyun static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun #define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /*
319*4882a593Smuzhiyun * __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)
320*4882a593Smuzhiyun * returns true if chip_model is identical or belong to the OCTEON
321*4882a593Smuzhiyun * model group specified in arg_model.
322*4882a593Smuzhiyun */
323*4882a593Smuzhiyun /* NOTE: This for internal use only! */
324*4882a593Smuzhiyun #define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model) \
325*4882a593Smuzhiyun ((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) && ( \
326*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
327*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_MASK)) || \
328*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == 0) \
329*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_REV_MASK)) || \
330*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
331*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_FAMILY_MASK)) || \
332*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
333*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_38XX_MODEL_REV_MASK)) || \
334*4882a593Smuzhiyun ((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
335*4882a593Smuzhiyun && (((chip_model) & OCTEON_38XX_MODEL_MASK) < ((arg_model) & OCTEON_38XX_MODEL_MASK))) \
336*4882a593Smuzhiyun )) || \
337*4882a593Smuzhiyun (((arg_model & OCTEON_38XX_FAMILY_MASK) >= OCTEON_CN58XX_PASS1_0) && ( \
338*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == (OM_IGNORE_REVISION | OM_CHECK_SUBMODEL)) \
339*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
340*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == 0) \
341*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_REV_MASK)) || \
342*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_MINOR_REVISION) \
343*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MINOR_REV_MASK)) || \
344*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
345*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) || \
346*4882a593Smuzhiyun ((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
347*4882a593Smuzhiyun && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
348*4882a593Smuzhiyun ((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
349*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN58XX_PASS1_0) \
350*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) || \
351*4882a593Smuzhiyun ((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
352*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) \
353*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) || \
354*4882a593Smuzhiyun ((((arg_model) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == OM_MATCH_F7XXX_FAMILY_MODELS) \
355*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) \
356*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) || \
357*4882a593Smuzhiyun ((((arg_model) & (OM_MATCH_7XXX_FAMILY_MODELS)) == OM_MATCH_7XXX_FAMILY_MODELS) \
358*4882a593Smuzhiyun && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN78XX_PASS1_0)) || \
359*4882a593Smuzhiyun ((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
360*4882a593Smuzhiyun && (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
361*4882a593Smuzhiyun )))
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* NOTE: This for internal use only!!!!! */
__octeon_is_model_runtime__(uint32_t model)364*4882a593Smuzhiyun static inline int __octeon_is_model_runtime__(uint32_t model)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun uint32_t cpuid = cvmx_get_proc_id();
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun /*
372*4882a593Smuzhiyun * The OCTEON_IS_MODEL macro should be used for all Octeon model checking done
373*4882a593Smuzhiyun * in a program.
374*4882a593Smuzhiyun * This should be kept runtime if at all possible and must be conditionalized
375*4882a593Smuzhiyun * with OCTEON_IS_COMMON_BINARY() if runtime checking support is required.
376*4882a593Smuzhiyun *
377*4882a593Smuzhiyun * Use of the macro in preprocessor directives ( #if OCTEON_IS_MODEL(...) )
378*4882a593Smuzhiyun * is NOT SUPPORTED, and should be replaced with CVMX_COMPILED_FOR()
379*4882a593Smuzhiyun * I.e.:
380*4882a593Smuzhiyun * #if OCTEON_IS_MODEL(OCTEON_CN56XX) -> #if CVMX_COMPILED_FOR(OCTEON_CN56XX)
381*4882a593Smuzhiyun */
382*4882a593Smuzhiyun #define OCTEON_IS_MODEL(x) __octeon_is_model_runtime__(x)
383*4882a593Smuzhiyun #define OCTEON_IS_COMMON_BINARY() 1
384*4882a593Smuzhiyun #undef OCTEON_MODEL
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun #define OCTEON_IS_OCTEON1() OCTEON_IS_MODEL(OCTEON_CN3XXX)
387*4882a593Smuzhiyun #define OCTEON_IS_OCTEONPLUS() OCTEON_IS_MODEL(OCTEON_CN5XXX)
388*4882a593Smuzhiyun #define OCTEON_IS_OCTEON2() \
389*4882a593Smuzhiyun (OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun #define OCTEON_IS_OCTEON3() OCTEON_IS_MODEL(OCTEON_CN7XXX)
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun #define OCTEON_IS_OCTEON1PLUS() (OCTEON_IS_OCTEON1() || OCTEON_IS_OCTEONPLUS())
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun const char *__init octeon_model_get_string(uint32_t chip_id);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /*
398*4882a593Smuzhiyun * Return the octeon family, i.e., ProcessorID of the PrID register.
399*4882a593Smuzhiyun *
400*4882a593Smuzhiyun * @return the octeon family on success, ((unint32_t)-1) on error.
401*4882a593Smuzhiyun */
cvmx_get_octeon_family(void)402*4882a593Smuzhiyun static inline uint32_t cvmx_get_octeon_family(void)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun return cvmx_get_proc_id() & OCTEON_FAMILY_MASK;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun #include <asm/octeon/octeon-feature.h>
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun #endif /* __OCTEON_MODEL_H__ */
410