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Searched refs:core_dclk_div (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip_vop_reg.c110 .core_dclk_div = VOP_REG_VER(RK3399_DSP_CTRL0, 0x1, 4, 3, 4, -1),
369 .core_dclk_div = VOP_REG(RK3328_DSP_CTRL0, 0x1, 4),
540 .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
756 .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
840 .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
H A Drockchip_vop.h262 struct vop_reg core_dclk_div; member
H A Drockchip_vop.c490 VOP_CTRL_SET(vop, core_dclk_div, in rockchip_vop_init()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_vop_reg.c277 .core_dclk_div = VOP_REG_VER(RK3366_DSP_CTRL0, 0x1, 4, 3, 4, -1),
1043 .core_dclk_div = VOP_REG(RK3328_DSP_CTRL0, 0x1, 4),
1272 .core_dclk_div = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 30),
1548 .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
1799 .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
1901 .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13),
H A Drockchip_vop2_reg.c779 .core_dclk_div = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 4),
857 .core_dclk_div = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 4),
973 .core_dclk_div = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 4),
1063 .core_dclk_div = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 4),
1150 .core_dclk_div = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 4),
1204 .core_dclk_div = VOP_REG(RK3568_VP2_DSP_CTRL, 0x1, 4),
H A Drockchip_drm_vop.h272 struct vop_reg core_dclk_div; member
812 struct vop_reg core_dclk_div; member
H A Drockchip_drm_vop.c3432 VOP_CTRL_SET(vop, core_dclk_div, in vop_crtc_atomic_enable()
H A Drockchip_drm_vop2.c8054 VOP_MODULE_SET(vop2, vp, core_dclk_div, 1); in vop2_crtc_atomic_enable()
8056 VOP_MODULE_SET(vop2, vp, core_dclk_div, 0); in vop2_crtc_atomic_enable()