Searched refs:clkstate (Results 1 – 7 of 7) sorted by relevance
493 uint clkstate; /* State of sd and backplane clock(s) */ member783 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in brcmf_sdio_htclk()821 bus->clkstate = CLK_PENDING; in brcmf_sdio_htclk()824 } else if (bus->clkstate == CLK_PENDING) { in brcmf_sdio_htclk()856 bus->clkstate = CLK_AVAIL; in brcmf_sdio_htclk()869 if (bus->clkstate == CLK_PENDING) { in brcmf_sdio_htclk()878 bus->clkstate = CLK_SDONLY; in brcmf_sdio_htclk()897 bus->clkstate = CLK_SDONLY; in brcmf_sdio_sdclk()899 bus->clkstate = CLK_NONE; in brcmf_sdio_sdclk()908 uint oldstate = bus->clkstate; in brcmf_sdio_clkctl()[all …]
333 uint clkstate; /* State of sd and backplane clock(s) */ member1193 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()1364 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()1492 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1542 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()1547 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1573 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()1597 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1604 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()1666 bus->clkstate = CLK_SDONLY; in dhdsdio_sdclk()[all …]
341 uint clkstate; /* State of sd and backplane clock(s) */ member1193 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()1300 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()1417 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1468 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()1473 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1499 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()1523 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1530 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()1596 bus->clkstate = CLK_SDONLY; in dhdsdio_sdclk()[all …]
356 uint clkstate; /* State of sd and backplane clock(s) */ member1250 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()1357 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()1474 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1525 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()1530 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1556 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()1580 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1587 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()1653 bus->clkstate = CLK_SDONLY; in dhdsdio_sdclk()[all …]
341 uint clkstate; /* State of sd and backplane clock(s) */ member1189 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()1296 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()1413 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1464 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()1469 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1495 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()1519 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1526 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()1592 bus->clkstate = CLK_SDONLY; in dhdsdio_sdclk()[all …]
354 uint clkstate; /* State of sd and backplane clock(s) */ member1376 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()1490 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()1627 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1639 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1692 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()1697 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1723 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()1751 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1758 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()[all …]
353 uint clkstate; /* State of sd and backplane clock(s) */ member1375 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()1489 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()1626 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1638 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()1691 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()1696 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1722 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()1750 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()1757 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()[all …]