Lines Matching refs:clkstate
356 uint clkstate; /* State of sd and backplane clock(s) */ member
1250 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_kso_iovar()
1357 if (bus->clkstate == CLK_NONE) { in dhdsdio_clk_devsleep_iovar()
1474 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY); in dhdsdio_htclk()
1525 bus->clkstate = CLK_PENDING; in dhdsdio_htclk()
1530 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()
1556 bus->clkstate = CLK_AVAIL; in dhdsdio_htclk()
1580 if (bus->clkstate == CLK_PENDING) { in dhdsdio_htclk()
1587 bus->clkstate = CLK_SDONLY; in dhdsdio_htclk()
1653 bus->clkstate = CLK_SDONLY; in dhdsdio_sdclk()
1681 bus->clkstate = CLK_NONE; in dhdsdio_sdclk()
1695 uint oldstate = bus->clkstate; in dhdsdio_clkctl()
1701 if (bus->clkstate == target) { in dhdsdio_clkctl()
1715 if (bus->clkstate == CLK_NONE) in dhdsdio_clkctl()
1751 if (bus->clkstate == CLK_NONE) in dhdsdio_clkctl()
1753 else if (bus->clkstate == CLK_AVAIL) in dhdsdio_clkctl()
1757 bus->clkstate, target)); in dhdsdio_clkctl()
1785 if (bus->clkstate == CLK_AVAIL) in dhdsdio_clkctl()
1797 DHD_INFO(("dhdsdio_clkctl: %d -> %d\n", oldstate, bus->clkstate)); in dhdsdio_clkctl()
2168 (bus->clkstate != CLK_AVAIL)) { in dhd_bus_txdata()
2919 __FUNCTION__, bus->tx_max, bus->tx_seq, bus->clkstate)); in dhd_bus_txctl()
3334 bus->clkstate, bus->activity, bus->idletime, bus->idlecount, bus->sleeping); in dhd_bus_dump()
5679 if (bus->clkstate != CLK_AVAIL) { in dhd_bus_init()
5680 DHD_ERROR(("%s: clock state is wrong. state = %d\n", __FUNCTION__, bus->clkstate)); in dhd_bus_init()
6558 if (TXCTLOK(bus) && bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL)) {
6560 } else if (bus->dotxinrx && (bus->clkstate == CLK_AVAIL) &&
7343 if (!SLPAUTO_ENAB(bus) && (bus->clkstate == CLK_PENDING)) {
7385 bus->clkstate = CLK_AVAIL;
7395 if (bus->clkstate != CLK_AVAIL)
7562 if (TXCTLOK(bus) && bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL))
7566 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
7604 } else if (bus->clkstate == CLK_PENDING) {
7615 if ((bus->idletime == DHD_IDLE_IMMEDIATE) && (bus->clkstate != CLK_PENDING) &&
8210 if ((bus->idletime != 0) && (bus->clkstate == CLK_AVAIL) &&
9094 bus->clkstate = CLK_SDONLY;