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Searched refs:cfg_val (Results 1 – 12 of 12) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/gpio/
H A Dmvmfp.c33 u32 cfg_val, val; in mfp_config() local
36 cfg_val = *mfp_cfgs++; in mfp_config()
38 if (cfg_val == MFP_EOC) in mfp_config()
42 + MFP_REG_GET_OFFSET(cfg_val)); in mfp_config()
46 if (cfg_val & MFP_VALUE_MASK) in mfp_config()
47 val |= cfg_val & MFP_VALUE_MASK; in mfp_config()
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/
H A Dinit.c105 void boot_mode_apply(unsigned cfg_val) in boot_mode_apply() argument
109 writel(cfg_val, &psrc->gpr9); in boot_mode_apply()
111 if (cfg_val) in boot_mode_apply()
H A Dcmd_bmode.c75 boot_mode_apply(p->cfg_val); in do_boot_mode()
76 if (reset_requested && p->cfg_val) in do_boot_mode()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/mach-imx/
H A Dboot_mode.h35 unsigned cfg_val; member
39 void boot_mode_apply(unsigned cfg_val);
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx5/
H A Dsoc.c89 void boot_mode_apply(unsigned cfg_val) in boot_mode_apply() argument
91 writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr); in boot_mode_apply()
/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/tsp/
H A Drockchip_tsp.c318 u32 ctrl_val, cfg_val; in rockchip_feed_sec_buf() local
325 cfg_val = TSP_RD(dev, PTI0_PID0_CFG + 20 * index); in rockchip_feed_sec_buf()
326 if (cfg_val == 0) in rockchip_feed_sec_buf()
328 cfg_val, index); in rockchip_feed_sec_buf()
330 if ((!(ctrl_val & 0x01)) || cfg_val == 0) in rockchip_feed_sec_buf()
510 u32 ctrl_val, cfg_val, state_val, erro_state_occur; in rockchip_feed_ts_buf() local
546 cfg_val = TSP_RD(dev, PTI0_PID0_CFG + 20 * id); in rockchip_feed_ts_buf()
547 if ((cfg_val & 0x30) != 0x30) in rockchip_feed_ts_buf()
549 cfg_val, id); in rockchip_feed_ts_buf()
552 if ((!(ctrl_val & 0x01)) || ((cfg_val & 0x30) != 0x30)) in rockchip_feed_ts_buf()
/OK3568_Linux_fs/kernel/sound/x86/
H A Dintel_hdmi_audio.c351 union aud_cfg cfg_val = {.regval = 0}; in had_init_audio_ctrl() local
363 cfg_val.regx.num_ch = channels - 2; in had_init_audio_ctrl()
365 cfg_val.regx.layout = LAYOUT0; in had_init_audio_ctrl()
367 cfg_val.regx.layout = LAYOUT1; in had_init_audio_ctrl()
370 cfg_val.regx.packet_mode = 1; in had_init_audio_ctrl()
373 cfg_val.regx.left_align = 1; in had_init_audio_ctrl()
375 cfg_val.regx.val_bit = 1; in had_init_audio_ctrl()
379 cfg_val.regx.dp_modei = 1; in had_init_audio_ctrl()
380 cfg_val.regx.set = 1; in had_init_audio_ctrl()
383 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.regval); in had_init_audio_ctrl()
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/bcm/
H A Dpinctrl-bcm281xx.c1338 u32 cfg_val, cfg_mask; in bcm281xx_pinctrl_pin_config_set() local
1341 cfg_val = 0; in bcm281xx_pinctrl_pin_config_set()
1349 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1354 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1359 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1374 __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1376 rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val); in bcm281xx_pinctrl_pin_config_set()
/OK3568_Linux_fs/kernel/drivers/soc/xilinx/
H A Dxlnx_vcu.c299 u32 cfg_val, mod, ctrl; in xvcu_set_vcu_pll_info() local
428 cfg_val = (found->res << VCU_PLL_CFG_RES_SHIFT) | in xvcu_set_vcu_pll_info()
433 xvcu_write(xvcu->vcu_slcr_ba, VCU_PLL_CFG, cfg_val); in xvcu_set_vcu_pll_info()
/OK3568_Linux_fs/u-boot/drivers/spi/
H A Dfsl_dspi.c147 static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val) in fsl_dspi_init_mcr() argument
152 dspi_write32(priv->flags, &priv->regs->mcr, cfg_val); in fsl_dspi_init_mcr()
157 priv->mcr_val = cfg_val; in fsl_dspi_init_mcr()
/OK3568_Linux_fs/kernel/drivers/parisc/
H A Dsba_iommu.c1642 unsigned long cfg_val; in sba_hw_init() local
1645 cfg_val = READ_REG(rope_cfg); in sba_hw_init()
1646 cfg_val &= ~IOC_ROPE_AO; in sba_hw_init()
1647 WRITE_REG(cfg_val, rope_cfg); in sba_hw_init()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/broadcom/
H A Dtg3.c9197 u32 cfg_val; in tg3_chip_reset() local
9203 pci_read_config_dword(tp->pdev, 0xc4, &cfg_val); in tg3_chip_reset()
9205 cfg_val | (1 << 15)); in tg3_chip_reset()