Searched refs:TIMER_ENABLE (Results 1 – 9 of 9) sorted by relevance
24 #define TIMER_ENABLE 0x0008 macro42 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_interrupt()44 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_interrupt()53 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_next_event()56 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_next_event()65 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); in msm_timer_set_next_event()73 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_shutdown()75 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_shutdown()186 writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); in msm_timer_init()
39 #define TIMER_ENABLE BIT(7) macro78 cfg |= TIMER_ENABLE; in oxnas_rps_timer_config()192 writel_relaxed(TIMER_PERIODIC | TIMER_ENABLE | TIMER_DIV16, in oxnas_rps_clocksource_init()
30 #define TIMER_ENABLE 0x1 macro66 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
24 #define TIMER_ENABLE (1 << 7) macro41 tmr_ctrl_val &= ~TIMER_ENABLE; in timer_init()58 tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); in timer_init()
22 #define TIMER_ENABLE (1 << 7) macro103 writel(TIMER_ENABLE | TIMER_CLKSEL, in timer_init()
22 #define TIMER_ENABLE BIT(0) macro91 iowrite32(TIMER_ENABLE, &rtos_timer->enable); in set_next_event()
12 #define TIMER_ENABLE 0x080 /* ENT0 */ macro
82 tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ in timer_init()
28 #define TIMER_ENABLE BIT(0) macro163 TIMER_ENABLE | TIMER_MODE_USER_DEFINED_COUNT | in rk_timer_rtc_reset()