Searched refs:TEGRA124_CLK_PLL_M_UD (Results 1 – 7 of 7) sorted by relevance
346 #define TEGRA124_CLK_PLL_M_UD 313 macro
342 #define TEGRA124_CLK_PLL_M_UD 313 macro
63 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;75 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;81 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
58 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;70 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;76 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
62 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;74 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;133 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;145 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;204 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;216 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
65 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
1145 clks[TEGRA124_CLK_PLL_M_UD] = clk; in tegra124_pll_init()