Searched refs:PMU1_PLL0_PC1_M4DIV_MASK (Results 1 – 8 of 8) sorted by relevance
4441 mdiv = (tmp & PMU1_PLL0_PC1_M4DIV_MASK) >> PMU1_PLL0_PC1_M4DIV_SHIFT; in si_pmu_get_backplaneclkspeed()4565 mdiv = (tmp & PMU1_PLL0_PC1_M4DIV_MASK) >> PMU1_PLL0_PC1_M4DIV_SHIFT; in BCMPOSTTRAPFN()4569 mdiv = (tmp & PMU1_PLL0_PC1_M4DIV_MASK) >> PMU1_PLL0_PC1_M4DIV_SHIFT; in BCMPOSTTRAPFN()4575 mdiv = (tmp & PMU1_PLL0_PC1_M4DIV_MASK) >> PMU1_PLL0_PC1_M4DIV_SHIFT; in BCMPOSTTRAPFN()4772 & PMU1_PLL0_PC1_M4DIV_MASK) >> PMU1_PLL0_PC1_M4DIV_SHIFT; in si_pmu_fvco_macdiv()4786 & PMU1_PLL0_PC1_M4DIV_MASK) >> PMU1_PLL0_PC1_M4DIV_SHIFT; in si_pmu_fvco_macdiv()
1843 #define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 macro
1597 #define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 macro
2497 #define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 macro