Searched refs:PLL_SUBSYS_BASE (Results 1 – 3 of 3) sorted by relevance
82 #define MPU_PLL_BASE (PLL_SUBSYS_BASE + 0x048)83 #define L3_PLL_BASE (PLL_SUBSYS_BASE + 0x110)84 #define DDR_PLL_BASE (PLL_SUBSYS_BASE + 0x290)101 #define OSC_SRC_CTRL (PLL_SUBSYS_BASE + 0x2C0)
35 #define PLL_SUBSYS_BASE 0x481C5000 macro
515 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */