Searched refs:PLL_PD (Results 1 – 10 of 10) sorted by relevance
| /OK3568_Linux_fs/u-boot/board/imx31_phycore/ |
| H A D | lowlevel_init.S | 43 REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0xe) | PLL_MFI(9) | PLL_MFN(0xd) 45 REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1)
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| /OK3568_Linux_fs/kernel/drivers/misc/rk628/ |
| H A D | rk628_cru.c | 146 rk628_i2c_write(rk628, offset + CRU_CPLL_CON1, PLL_PD(1)); in rk628_cru_clk_set_rate_pll() 150 rk628_i2c_write(rk628, offset + CRU_CPLL_CON1, PLL_PD(0)); in rk628_cru_clk_set_rate_pll() 247 rk628_i2c_write(rk628, offset + CRU_CPLL_CON1, PLL_PD(0)); in rk628_cru_clk_set_rate_pll()
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| H A D | rk628_cru.h | 27 #define PLL_PD(x) HIWORD_UPDATE(x, 13, 13) macro
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| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | mx31pdk.h | 152 #define CCM_MPCTL_SETUP_532MHZ (PLL_PD(0) | PLL_MFD(51) | PLL_MFI(10) | \
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| /OK3568_Linux_fs/u-boot/board/freescale/mx31pdk/ |
| H A D | lowlevel_init.S | 29 write32 CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
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| /OK3568_Linux_fs/kernel/drivers/media/i2c/rk628/ |
| H A D | rk628_cru.h | 27 #define PLL_PD(x) HIWORD_UPDATE(x, 13, 13) macro
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| H A D | rk628_cru.c | 149 rk628_i2c_write(rk628, offset + CRU_CPLL_CON1, PLL_PD(0)); in rk628_cru_clk_set_rate_pll()
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| /OK3568_Linux_fs/u-boot/board/freescale/mx31ads/ |
| H A D | lowlevel_init.S | 242 REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx35/ |
| H A D | imx-regs.h | 134 #define PLL_PD(x) (((x) & 0xf) << 26) macro
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx31/ |
| H A D | imx-regs.h | 581 #define PLL_PD(x) (((x) & 0xf) << 26) macro
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