Searched refs:PLL_MODE_MASK (Results 1 – 11 of 11) sorted by relevance
| /OK3568_Linux_fs/kernel/drivers/clk/spear/ |
| H A D | clk-vco-pll.c | 48 #define PLL_MODE_MASK 3 macro
202 mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK; in clk_vco_recalc_rate()
245 val &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); in clk_vco_set_rate()
246 val |= (rtbl[i].mode & PLL_MODE_MASK) << PLL_MODE_SHIFT; in clk_vco_set_rate()
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| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_pll.c | 18 #define PLL_MODE_MASK 0x3 macro
575 pll->mode_mask = PLL_MODE_MASK; in rockchip_pll_get_rate()
583 pll->mode_mask = PLL_MODE_MASK; in rockchip_pll_get_rate()
604 pll->mode_mask = PLL_MODE_MASK; in rockchip_pll_set_rate()
612 pll->mode_mask = PLL_MODE_MASK; in rockchip_pll_set_rate()
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| H A D | clk_rk3399.c | 116 PLL_MODE_MASK = 3 << PLL_MODE_SHIFT, enumerator
348 switch ((con & PLL_MODE_MASK) >> PLL_MODE_SHIFT) { in rkclk_pll_get_rate()
384 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()
405 rk_clrsetreg(&pll_con[3], PLL_MODE_MASK, in rkclk_set_pll()
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| H A D | clk_rk3368.c | 232 switch ((con & PLL_MODE_MASK) >> PLL_MODE_SHIFT) { in rkclk_pll_get_rate()
261 rk_clrsetreg(&pll->con3, PLL_MODE_MASK | PLL_RESET_MASK, in rkclk_set_pll()
286 rk_clrsetreg(&pll->con3, PLL_MODE_MASK, in rkclk_set_pll()
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| /OK3568_Linux_fs/kernel/drivers/ptp/ |
| H A D | ptp_idt82p33.h | 57 #define PLL_MODE_MASK (0x1F) macro
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| H A D | idt8a340_reg.h | 572 #define PLL_MODE_MASK (0x7) macro
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| H A D | ptp_idt82p33.c | 174 dpll_mode &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); in idt82p33_dpll_set_mode()
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| H A D | ptp_clockmatrix.c | 1224 dpll_mode &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); in idtcm_set_pll_mode()
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3368.h | 88 PLL_MODE_MASK = GENMASK(9, 8), enumerator
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| /OK3568_Linux_fs/kernel/arch/mips/ar7/ |
| H A D | clock.c | 52 #define PLL_MODE_MASK 0x00000001 macro
189 if ((pll & PLL_MODE_MASK) == 0) in tnetd7300_get_clock()
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| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | clk-pll.c | 23 #define PLL_MODE_MASK 0x3 macro
1660 pll_mux->mask = PLL_MODE_MASK; in rockchip_clk_register_pll()
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