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Searched refs:PLLE_BASE_NDIV (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c663 #define PLLE_BASE_NDIV(x) (((x) & 0xff) << 8) macro
743 value &= ~PLLE_BASE_NDIV(0xff); in tegra_plle_enable()
744 value |= PLLE_BASE_NDIV(n); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c947 #define PLLE_BASE_NDIV(x) (((x) & 0xff) << 8) macro
996 value &= ~PLLE_BASE_NDIV(0xff); in tegra_plle_enable()
999 value |= PLLE_BASE_NDIV(n); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1132 #define PLLE_BASE_NDIV(x) (((x) & 0xff) << 8) macro
1185 value &= ~PLLE_BASE_NDIV(0xff); in tegra_plle_enable()
1188 value |= PLLE_BASE_NDIV(0x7d); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c634 #define PLLE_BASE_NDIV(x) (((x) & 0xff) << 8) macro