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Searched refs:PLLE_AUX_SEQ_ENABLE (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-pll.c98 #define PLLE_AUX_SEQ_ENABLE BIT(24) macro
1629 val &= ~PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra114_enable()
1684 val |= PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra114_enable()
2466 if (val & PLLE_AUX_SEQ_ENABLE) in clk_plle_tegra210_enable()
2526 val |= PLLE_AUX_SEQ_ENABLE; in clk_plle_tegra210_enable()
2547 if (val & PLLE_AUX_SEQ_ENABLE) in clk_plle_tegra210_disable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c959 #define PLLE_AUX_SEQ_ENABLE (1 << 24) macro
973 value &= ~PLLE_AUX_SEQ_ENABLE; in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1147 #define PLLE_AUX_SEQ_ENABLE (1 << 24) macro
1255 value |= PLLE_AUX_SEQ_ENABLE; in tegra_plle_enable()