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Searched refs:PHY_SetBBReg (Results 1 – 25 of 74) sorted by relevance

123

/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/
H A Dhal_mp.c157 PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); in hal_mpt_CCKTxPowerAdjust()
158 PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); in hal_mpt_CCKTxPowerAdjust()
165 …PHY_SetBBReg(Adapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].va… in hal_mpt_CCKTxPowerAdjust()
294 PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); in mpt_SetTxPower_Old()
295 PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
300 PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[ODM_RF_PATH_B]); in mpt_SetTxPower_Old()
301 PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
316 PHY_SetBBReg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); in mpt_SetTxPower_Old()
317 PHY_SetBBReg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); in mpt_SetTxPower_Old()
318 PHY_SetBBReg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); in mpt_SetTxPower_Old()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/
H A Dhal_mp.c172 PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); in hal_mpt_CCKTxPowerAdjust()
173 PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); in hal_mpt_CCKTxPowerAdjust()
180 …PHY_SetBBReg(Adapter, pHalData->RegForRecover[i].offset, bMaskDWord, pHalData->RegForRecover[i].va… in hal_mpt_CCKTxPowerAdjust()
188 PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskDWord, 0x0000B81C); in hal_mpt_CCKTxPowerAdjust()
189 PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskDWord, 0x00000000); in hal_mpt_CCKTxPowerAdjust()
190 PHY_SetBBReg(Adapter, 0xAAC, bMaskDWord, 0x00003667); in hal_mpt_CCKTxPowerAdjust()
193 PHY_SetBBReg(Adapter, in hal_mpt_CCKTxPowerAdjust()
320 PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); in mpt_SetTxPower_Old()
321 PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); in mpt_SetTxPower_Old()
326 PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[ODM_RF_PATH_B]); in mpt_SetTxPower_Old()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/
H A Dhal_mp.c156 PHY_SetBBReg(Adapter, rCCK0_TxFilter1, bMaskDWord, 0xD1D80000); in hal_mpt_CCKTxPowerAdjust()
157 PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskDWord, 0x5A7DA0BD); in hal_mpt_CCKTxPowerAdjust()
158 PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskDWord, 0x0000223B); in hal_mpt_CCKTxPowerAdjust()
160 PHY_SetBBReg(Adapter, 0xA98, bMaskDWord, 0x05100000); in hal_mpt_CCKTxPowerAdjust()
161 PHY_SetBBReg(Adapter, 0xA9C, bMaskDWord, 0); in hal_mpt_CCKTxPowerAdjust()
162 PHY_SetBBReg(Adapter, 0xAA0, bMaskDWord, 0); in hal_mpt_CCKTxPowerAdjust()
166 PHY_SetBBReg(Adapter, rCCK0_TxFilter2, bMaskHWord, 0); in hal_mpt_CCKTxPowerAdjust()
167 PHY_SetBBReg(Adapter, rCCK0_DebugPort, bMaskLWord, 0); in hal_mpt_CCKTxPowerAdjust()
173 …PHY_SetBBReg(Adapter, pHalData->BBRegForRecover[i].offset, bMaskDWord, pHalData->BBRegForRecover[i… in hal_mpt_CCKTxPowerAdjust()
301 PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); in mpt_SetTxPower_Old()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8723bs/hal/
H A DHalPhyRf_8723B.c89 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); in setIqkMatrix_8723B()
92 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); in setIqkMatrix_8723B()
95 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32); in setIqkMatrix_8723B()
102 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); in setIqkMatrix_8723B()
105 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); in setIqkMatrix_8723B()
108 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, value32); in setIqkMatrix_8723B()
117 …PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); in setIqkMatrix_8723B()
118 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); in setIqkMatrix_8723B()
119 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00); in setIqkMatrix_8723B()
123 …PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]); in setIqkMatrix_8723B()
[all …]
H A Dodm_DynamicBBPowerSaving.c65 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ in ODM_RF_Saving()
66 PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, 0); /* RegC70[3]= 1'b0 */ in ODM_RF_Saving()
67 PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */ in ODM_RF_Saving()
68 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ in ODM_RF_Saving()
69 PHY_SetBBReg(pDM_Odm->Adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */ in ODM_RF_Saving()
70 PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x0); /* Reg818[28]= 1'b0 */ in ODM_RF_Saving()
71 PHY_SetBBReg(pDM_Odm->Adapter, 0x818, BIT28, 0x1); /* Reg818[28]= 1'b1 */ in ODM_RF_Saving()
73 PHY_SetBBReg(pDM_Odm->Adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874); in ODM_RF_Saving()
74 PHY_SetBBReg(pDM_Odm->Adapter, 0xc70, BIT3, pDM_PSTable->RegC70); in ODM_RF_Saving()
75 PHY_SetBBReg(pDM_Odm->Adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); in ODM_RF_Saving()
[all …]
H A Drtl8723b_phycfg.c149 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
153 …PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
157 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEd… in phy_RFSerialRead_8723B()
158 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge… in phy_RFSerialRead_8723B()
257 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite_8723B()
492 PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); in PHY_BBConfig8723B()
537 PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
540 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); in PHY_SetTxPowerIndex()
543 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); in PHY_SetTxPowerIndex()
546 PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); in PHY_SetTxPowerIndex()
[all …]
H A Drtl8723b_rf6052.c111 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in phy_RF6052_Config_ParaFile()
115 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF6052_Config_ParaFile()
119 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 825… in phy_RF6052_Config_ParaFile()
122 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255… in phy_RF6052_Config_ParaFile()
141 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF6052_Config_ParaFile()
145 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); in phy_RF6052_Config_ParaFile()
H A Dodm_DIG.c23 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /* 0xe28[7:0]= 0xff th_… in odm_NHMCounterStatisticsInit()
24 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 … in odm_NHMCounterStatisticsInit()
25 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); /* 0xc0c[7]= 1 max power a… in odm_NHMCounterStatisticsInit()
53 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); in odm_NHMCounterStatisticsReset()
54 PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); in odm_NHMCounterStatisticsReset()
152 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_SearchPwdBLowerBound()
153 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc); in odm_SearchPwdBLowerBound()
176 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_SearchPwdBLowerBound()
177 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc); in odm_SearchPwdBLowerBound()
230 PHY_SetBBReg(pDM_Odm->Adapter, REG_RD_CTRL, BIT11, 1); /* stop counting if EDCCA is asserted */ in odm_AdaptivityInit()
[all …]
H A Dodm_RegConfig8723B.c156 PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); in odm_ConfigBB_AGC_8723B()
220 PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); in odm_ConfigBB_PHY_8723B()
H A Dodm_NoiseMonitor.c64 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 1); in odm_InbandNoise_Monitor_NSeries()
75 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 0); in odm_InbandNoise_Monitor_NSeries()
H A Dodm_CfoTracking.c22 PHY_SetBBReg( in odm_SetCrystalCap()
58 PHY_SetBBReg( in odm_SetATCStatus()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/rtl8188e/
H A Drtl8188e_phycfg.c497 PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); in phy_RFSerialRead()
500 PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); in phy_RFSerialRead()
622 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite()
1008 PHY_SetBBReg(Adapter, rFPGA0_TxInfo, 0x3, 0x1); in phy_BB8192C_Config_1T()
1009 PHY_SetBBReg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101); in phy_BB8192C_Config_1T()
1010 PHY_SetBBReg(Adapter, 0xe74, 0x0c000000, 0x1); in phy_BB8192C_Config_1T()
1011 PHY_SetBBReg(Adapter, 0xe78, 0x0c000000, 0x1); in phy_BB8192C_Config_1T()
1012 PHY_SetBBReg(Adapter, 0xe7c, 0x0c000000, 0x1); in phy_BB8192C_Config_1T()
1013 PHY_SetBBReg(Adapter, 0xe80, 0x0c000000, 0x1); in phy_BB8192C_Config_1T()
1014 PHY_SetBBReg(Adapter, 0xe88, 0x0c000000, 0x1); in phy_BB8192C_Config_1T()
[all …]
H A Drtl8188e_rf6052.c214 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); in phy_RF6052_Config_ParaFile()
218 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF6052_Config_ParaFile()
222 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 in phy_RF6052_Config_ParaFile()
225 PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 in phy_RF6052_Config_ParaFile()
264 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF6052_Config_ParaFile()
268 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); in phy_RF6052_Config_ParaFile()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/
H A Drtl8723b_phycfg.c251 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
257 …PHY_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge… in phy_RFSerialRead_8723B()
261 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEd… in phy_RFSerialRead_8723B()
262 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge… in phy_RFSerialRead_8723B()
370 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite_8723B()
617 …PHY_SetBBReg(Adapter, Rtl8723BPHY_REGArray_Table_MP[i], bMaskDWord, Rtl8723BPHY_REGArray_Table_MP[… in phy_ConfigBBWithMpHeaderFile()
798 PHY_SetBBReg(Adapter, rRxPath_Jaguar, bRxPath_Jaguar, 0x11);
800 PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskLWord, 0x1111);
802 PHY_SetBBReg(Adapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0);
804 PHY_SetBBReg(Adapter, 0x8bc, 0xc0000060, 0x4);
[all …]
H A Drtl8723b_rf6052.c157 PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); in phy_RF6052_Config_ParaFile()
161 PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in phy_RF6052_Config_ParaFile()
165 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 in phy_RF6052_Config_ParaFile()
168 PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 in phy_RF6052_Config_ParaFile()
207 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); in phy_RF6052_Config_ParaFile()
211 PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); in phy_RF6052_Config_ParaFile()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/phydm/
H A Dhalphyrf_ap.c227 PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
230 PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
233 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
235 …PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index… in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
236 PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
237 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), 0x00); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
259 PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
262 PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
265 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
267 …PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index… in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
[all …]
H A Dphydm_interface.c164 PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); in ODM_SetMACReg()
167 PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); in ODM_SetMACReg()
196 PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); in ODM_SetBBReg()
199 PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); in ODM_SetBBReg()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/txbf/
H A Dhaltxbf8822b.c86 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0x6); /*1ss*/
87 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0x6); /*2ss*/
88 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x10); /*BC*/
89 …PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, BIT23|BIT22|BIT21|BIT20, 0x6); /*set TxPath selection …
90 …PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_1, bMaskByte3, 0x10); /*if Bfer enable, always use 3Tx…
91 PHY_SetBBReg(Adapter, REG_BB_TX_PATH_SEL_2, bMaskLWord, 0x1060);
95 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT3|BIT2|BIT1|BIT0, 0xe); /*1ss*/
96 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT7|BIT6|BIT5|BIT4, 0xe); /*2ss*/
97 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, 0x0000ff00, 0x90); /*BCD*/
98 PHY_SetBBReg(Adapter, REG_BB_TXBF_ANT_SET_BF0, BIT19|BIT18|BIT17|BIT16, 0xe); /*3ss*/
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/
H A Dhalphyrf_ap.c227 PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
230 PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
233 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
235 …PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index… in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
236 PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
237 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), 0x00); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
259 PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
262 PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
265 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
267 …PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index… in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
[all …]
H A Dphydm_interface.c164 PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); in ODM_SetMACReg()
167 PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); in ODM_SetMACReg()
196 PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); in ODM_SetBBReg()
199 PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); in ODM_SetBBReg()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/
H A Dhalphyrf_ap.c239 PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
242 PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
245 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
247 …PHY_SetBBReg(priv, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index… in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
248 PHY_SetBBReg(priv, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
249 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(24), 0x00); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
271 PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
274 PHY_SetBBReg(priv, rOFDM0_XDTxAFE, bMaskH4Bits, value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
277 PHY_SetBBReg(priv, rOFDM0_ECCAThreshold, BIT(28), value32); in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
279 …PHY_SetBBReg(priv, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_92E[(unsigned int)OFDM_index… in ODM_TXPowerTrackingCallback_ThermalMeter_92E()
[all …]
H A Dphydm_interface.c164 PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); in ODM_SetMACReg()
167 PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); in ODM_SetMACReg()
196 PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data); in ODM_SetBBReg()
199 PHY_SetBBReg(Adapter, RegAddr, BitMask, Data); in ODM_SetBBReg()
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/rtl8822b/
H A Drtl8822b_phy.c1574 PHY_SetBBReg(adapter, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(28)|BIT(29), 0x2); in _setbeamformrfmode()
1578 PHY_SetBBReg(adapter, REG_BB_TXBF_ANT_SET_BF0_8822B, 0xffff, 0x0433); in _setbeamformrfmode()
1579 PHY_SetBBReg(adapter, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); in _setbeamformrfmode()
1583 PHY_SetBBReg(adapter, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); in _setbeamformrfmode()
1584 PHY_SetBBReg(adapter, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); in _setbeamformrfmode()
1588 PHY_SetBBReg(adapter, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x1); /* 1SS by path-A */ in _setbeamformrfmode()
1589 PHY_SetBBReg(adapter, REG_BB_TX_PATH_SEL_2_8822B, bMaskLWord, 0x430); /* 2SS by path-A,B */ in _setbeamformrfmode()
1594 PHY_SetBBReg(adapter, REG_BB_TXBF_ANT_SET_BF1_8822B, BIT(31), 1); in _setbeamformrfmode()
1595 PHY_SetBBReg(adapter, REG_BB_TXBF_ANT_SET_BF1_8822B, 0xffff, 0x0433); in _setbeamformrfmode()
1596 PHY_SetBBReg(adapter, REG_BB_TX_PATH_SEL_1_8822B, 0xfff00000, 0x043); in _setbeamformrfmode()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/phydm/halrf/rtl8188e/
H A Dhalrf_8188e_win.c278 PHY_SetBBReg(adapter, REG_TX_AGC_A_CCK_1_MCS32, MASKBYTE1, pwr); in odm_tx_pwr_track_set_pwr88_e()
280 PHY_SetBBReg(adapter, REG_TX_AGC_B_CCK_11_A_CCK_2_11, 0xffffff00, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
286 PHY_SetBBReg(adapter, REG_TX_AGC_A_RATE18_06, MASKDWORD, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
287 PHY_SetBBReg(adapter, REG_TX_AGC_A_RATE54_24, MASKDWORD, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
288 PHY_SetBBReg(adapter, REG_TX_AGC_A_MCS03_MCS00, MASKDWORD, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
289 PHY_SetBBReg(adapter, REG_TX_AGC_A_MCS07_MCS04, MASKDWORD, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
290 PHY_SetBBReg(adapter, REG_TX_AGC_A_MCS11_MCS08, MASKDWORD, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
291 PHY_SetBBReg(adapter, REG_TX_AGC_A_MCS15_MCS12, MASKDWORD, tx_agc); in odm_tx_pwr_track_set_pwr88_e()
/OK3568_Linux_fs/kernel/drivers/staging/rtl8188eu/include/
H A Dhal8188e_phy_cfg.h161 #define PHY_SetMacReg PHY_SetBBReg

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