Searched refs:PCLK_PCIE_COMBO_PIPE_PHY0 (Results 1 – 5 of 5) sorted by relevance
389 #define PCLK_PCIE_COMBO_PIPE_PHY0 389 macro
1567 GATE(PCLK_PCIE_COMBO_PIPE_PHY0, "pclk_pcie_combo_pipe_phy0", "pclk_top_root", 0,
2293 clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>;
6709 clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>,