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Searched refs:IMX6UL_CLK_PLL4_POST_DIV (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Dimx6ul-clock.h62 #define IMX6UL_CLK_PLL4_POST_DIV 49 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dimx6ul-clock.h58 #define IMX6UL_CLK_PLL4_POST_DIV 49 macro
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx6ul.c217 hws[IMX6UL_CLK_PLL4_POST_DIV] = clk_hw_register_divider_table(NULL, "pll4_post_div", "pll4_audio", in imx6ul_clocks_init()