Searched refs:GPIO3_IOC_BASE (Results 1 – 3 of 3) sorted by relevance
141 #define GPIO3_IOC_BASE 0xFF070000 macro195 #define UART2_RX_M1_ADDR (GPIO3_IOC_BASE + 0x40)199 #define UART2_TX_M1_ADDR (GPIO3_IOC_BASE + 0x40)214 #define UART3_RX_M1_ADDR (GPIO3_IOC_BASE + 0x50)218 #define UART3_TX_M1_ADDR (GPIO3_IOC_BASE + 0x4C)224 #define UART4_RX_M0_ADDR (GPIO3_IOC_BASE + 0x58)228 #define UART4_TX_M0_ADDR (GPIO3_IOC_BASE + 0x58)252 #define UART5_RX_M1_ADDR (GPIO3_IOC_BASE + 0x44)256 #define UART5_TX_M1_ADDR (GPIO3_IOC_BASE + 0x44)281 #define UART7_RX_M0_ADDR (GPIO3_IOC_BASE + 0x54)[all …]
78 #define GPIO3_IOC_BASE 0xFF560000 macro130 #define UART2_RX_M0_ADDR (GPIO3_IOC_BASE + 0x60)134 #define UART2_TX_M0_ADDR (GPIO3_IOC_BASE + 0x60)197 #define UART6_RX_M0_ADDR (GPIO3_IOC_BASE + 0x64)201 #define UART6_TX_M0_ADDR (GPIO3_IOC_BASE + 0x64)206 #define UART6_RX_M1_ADDR (GPIO3_IOC_BASE + 0x70)210 #define UART6_TX_M1_ADDR (GPIO3_IOC_BASE + 0x70)216 #define UART7_RX_M0_ADDR (GPIO3_IOC_BASE + 0x68)220 #define UART7_TX_M0_ADDR (GPIO3_IOC_BASE + 0x68)
118 #define GPIO3_IOC_BASE 0xFF558000 macro197 #define UART2_RX_M0_ADDR (GPIO3_IOC_BASE + 0x40)201 #define UART2_TX_M0_ADDR (GPIO3_IOC_BASE + 0x40)254 #define UART5_RX_M0_ADDR (GPIO3_IOC_BASE + 0x44)272 #define UART5_RX_M2_ADDR (GPIO3_IOC_BASE + 0x58)480 writel(0xfff01110, GPIO3_IOC_BASE + GPIO3A_IOMUX_SEL_L); in arch_cpu_init()481 writel(0xffff1111, GPIO3_IOC_BASE + GPIO3A_IOMUX_SEL_H); in arch_cpu_init()